1
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 2A
ECO #15521
EDI9F416128C
FEATURES
n 4x128Kx16 bit CMOS Static
n Random Access Memory
Access Times 70 thru 100ns
Data Retention Function (EDI9F416128LP )
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
n High Density Packaging
80 Pin SIMM, No. 318
n Single +5V (10%) Supply Operation
4x128Kx16 Static RAM CMOS, Module
The EDI9F416128C is a 8192K bit CMOS Static RAM based on
eight 128Kx8 Static RAMs mounted on a multi-layered epoxy
laminate (FR-4) substrate.
A low power version with data retention (EDI9F416128LP) is also
available.
All inputs and outputs are TTL compatible and operate from a
single +5V supply. Fully asynchronous, the EDI9F416128C
requires no clocks or refreshing for operation.
PIN CONFIGURATIONS AND BLOCK DIAGRAM
DESCRIPTION
PIN NAMES
A-A16
Address Inputs
E-E3
Chip Enable
G
Output Enables
WH-WL
Write Enables
E
Chip Select
DQ-DQ15
Data Input/Output
VCC
Supply 5 Volts
VSS
Ground
NC
No Connect
FIG. 1
2
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 2A
ECO #15521
EDI9F416128C
ABSOLUTE MAXIMUM RATINGS*
RECOMMENDED DC OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS
(f=1.0MHz, VIN=VCC or VSS)
AC TEST CONDITIONS
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions greater than those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
TRUTH TABLE
CAPACITANCE
Voltage on any pin relative to VSS
-0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial
0C to +70C
Industrial
-40C to +85C
Storage Temperature
Plastic
-55C to +125C
Power Dissipation
1 Watt
Output Current.
20 mA
Parameter
Sym
Min
Typ
Max
Units
Supply Voltage
VCC
4.5
5.0
5.5
V
Supply Voltage
VSS
0
0
0
V
Input High Voltage
VIH
2.2
--
6.0
V
Input Low Voltage
VIL
-0.3
--
0.8
V
Input Pulse Levels
VSS to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Levels
1.5V
Output Load 70ns
1TTL = 30pF
85-120ns
1TTL, CL =100pF
Parameter
Sym
Conditions
Min
Typ
Max
Units
Operating Power
ICC1
W, E = VIL, II/O = 0mA,
--
94
158
mA
Supply Current
Min Cycle
Standby (TTL) Power
ICC2
E VIH, VIN VIL
--
56
120
mA
Supply Current
VIN VIH
Full Standby Power
ICC3
E VCC-0.2V
C
--
24
mA
Supply Current
VIN VCC-0.2V or
LP
--
80
A
CMOS
VIN 0.2V
Input Leakage Current
ILI
VIN = 0V to VCC
--
--
10
A
Output Leakage Current
ILO
V I/O = 0V to VCC
--
--
10
A
Output High Voltage
VOH
IOH = -1.0mA
2.4
--
--
V
Output Low Voltage
VOL
IOL = 2.1mA
--
--
0.4
V
G
E
W
Mode
Output
Power
X
H
X
Standby
High Z
ICC2, ICC3
H
L
H
Output Deselect
High Z
ICC1
L
L
H
Read
DOUT
ICC1
X
L
L
Write
DIN
ICC1
Parameter
Sym
Max
Unit
Address Lines
CI
60
pF
Data Lines
CD/Q80
pF
Chip Enable Line
CC
15
pF
Write and Output Enable Lines
CW
60
pF
3
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 2A
ECO #15521
EDI9F416128C
AC CHARACTERISTICS READ CYCLE
READ CYCLE 1 - W HIGH, G, E LOW
READ CYCLE 2 - W HIGH
Symbol
70ns
85ns
100ns
Parameter
JEDEC
Alt.
Min
Max Min
Max Min
Max
Units
Read Cycle Time
TAVAV
TRC
70
85
100
ns
Address Access Time
TAVQV
TAA
70
85
100
ns
Chip Enable Access Time
TELQV TACS
70
85
100
ns
Chip Enable to Output in Low Z (1)
TELQX TCLZ
5
5
5
ns
Chip Disable to Output in High Z (1)
TEHQZ TCHZ
30
35
40
ns
Output Hold from Address Change
TAVQX TOH
3
3
3
ns
Output Enable to Output Valid
TGLQV TOE
40
45
50
ns
Output Enable to Output in Low Z (1)
TGLQX TOLZ
0
0
0
ns
Output Disable to Output in High Z(1)
TGHQZ TOHZ
30
35
40
ns
FIG. 2
FIG. 3
ADDRESS 1
ADDRESS 2
TAVAV
DATA 1
DATA 2
TAVQV
TAVQX
9F416128C Rd Cyc1
A
Q
TGHQZ
TELQV
TELQX
E
G
Q
TEHQZ
A
TAVAV
TGLQV
TGLQX
TAVQV
9F416128C Rd Cyc2
4
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 2A
ECO #15521
EDI9F416128C
Note 1: Parameter guaranteed, but not tested. *Advance Information
WRITE CYCLE 1 - W CONTROLLED
AC CHARACTERISTICS WRITE CYCLE
Symbol
70ns
85ns
100ns
Parameter
JEDEC
Alt.
Min
Max Min
Max Min
Max
Units
Write Cycle Time
TAVAV TWC
70
85
100
ns
Chip Enable to End of Write
TELWH TCW
65
70
80
ns
TELEH TCW
65
70
80
ns
Address Setup Time
TAVWL
TAS
0
0
0
ns
TAVEL
TAS
0
0
0
ns
Address Valid to End of Write
TAVWH TAW
65
70
80
ns
TAVEH TAW
65
70
80
ns
Write Pulse Width
TWLWH TWP
65
70
80
ns
TWLEH TWP
65
70
80
ns
Write Recovery Time
TWHAX TWR
0
0
0
ns
TEHAX TWR
0
0
0
ns
Data Hold Time
TWHDX TDH
0
0
0
ns
TEHDX TDH
0
0
0
ns
Write to Output in High Z (1)
TWLQZ TWHZ
0
30
0
35
0
40
ns
Data to Write Time
TDVWH TDW
30
35
40
ns
TDVEH TDW
30
35
40
ns
Output Active from End of Write (1)
TWHQX TWLZ
5
5
5
ns
FIG. 4
E
A
TAVAV
TELWH
TAVWH
TWLWH
TAVWL
TWHAX
W
HIGH Z
DATA VALID
TWLQZ
TWHQX
TDVWH
TWHDX
Q
D
9F416128C Write Cyc1
5
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 2A
ECO #15521
EDI9F416128C
DATA RETENTION - E CONTROLLED
DATA RETENTION CHARACTERISTICS
WRITE CYCLE 2 - E CONTROLLED
FIG. 6
Characteristic
Sym
Test Conditions
VDD
Min
Typ
Max
Unit
Data Retention Voltage
VDD
VDD = 0.2V
2
--
V
Data Retention Quiescent Current
ICCDR
E VDD -0.2V
2V
--
1
6
A
VIN VDD -0.2V
3V
--
1
8
A
Chip Disable to Data Retention Time(1) TCDR
or VIN 0.2V
0
--
--
ns
Operation Recovery Time (1)
TR
5
--
--
ms
FIG. 5
A
TAVEL
HIGH Z
TAVAV
9F416128C Write Cyc2
TELEH
E
TAVEH
TEHAX
W
TWLEH
TEHDX
TDVEH
Q
DATA VALID
D
VCC
TR
9F416128C Data Retent.
DATA RETENTION MODE
E
TCDR
E
VDD-0.2V
VDD
4.5V
4.5V
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White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 2A
ECO #15521
EDI9F416128C
PACKAGE NO. 318: 80 LEAD SIMM ANGLED
PACKAGE DESCRIPTION
ORDERING INFORMATION
Part Number
Speed
Package
(ns)
No.
Standard Power
EDI9F416128C70BNC
70
318
EDI9F416128C85BNC
85
318
EDI9F416128C100BNC
100
318
Low Power
EDI9F416128LP70BNC
70
318
EDI9F416128LP85BNC
85
318
EDI9F416128LP100BNC
100
318
Note: To order an Industrial grade product substitute the letter C in the Suffix with
the letter I, eg. EDI9F416128C70BNC becomes EDI9F416128C70BNI.
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