1
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 1A
ECO #15432
EDI9G361024C
FEATURES
P
IN
C
ONFIGURATIONS
AND
B
LOCK
D
IAGRAM
n 1024K x 36 bit CMOS Static
n Random Access Memory
Access Times: 15, 20 and 25
Individual Byte Selects
Fully Static, No Clocks
TTL Compatible I/O
n High Density Package
72 lead SIMM, No. 401 (Angle)
Common Data Inputs and Outputs
n Single +5V (10%) Supply Operation
The EDI9G361024C is a high speed 36Mb Static RAM module
organized as 1024K words by 36 bits. This module is constructed
from nine 1024K x 4 Static RAMs in SOJ packages on an epoxy
laminate (FR4) board.
Four chip enables (E1-E4) are used to independently enable the
four bytes. Reading or writing can be executed on individual
bytes or any combination of multiple bytes through proper use of
chip enables.
The EDI9G361024C is offered in a 72 lead SIMM package, which
enables 36Mb of memory to be placed in less than 1.3 square
inches of board space.
All inputs and outputs are TTL compatible and operate from a
single 5V supply. Fully asynchronous circuitry requires no clocks
or refreshing for operation and provides equal access and cycle
times for ease of use.
1024K x 36 Static RAM CMOS, High Speed Module
P
IN
N
AMES
A0-A19
G\
DQ0-DQ3
DQ4-DQ7
DQ8-DQ11
DQ12-DQ15
U1
U2
U3
U4
W\
E1\
E2\
E3\
E4\
DQ16-DQ19
DQ20-DQ23
DQ24-DQ27
U5
U6
U7
DQ28-DQ31
DQ32-DQ35
U8
U9
E1\
9G361024C Blk Dia.
FIG. 1
DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
NC
NC
DQ34
DQ35
VSS
DQ32
DQ33
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
VCC
A0
A7
A1
A8
A2
A9
DQ12
DQ4
DQ13
DQ5
DQ14
DQ6
DQ15
DQ7
VSS
W\
A15
A14
E2\
E1\
9G3610242C Pin Config.
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
E4\
E3\
A17\
A16\
G\
VSS
DQ24
DQ16
DQ25
DQ17
DQ26
DQ18
DQ27
DQ19
A3
A10
A4
A11
A5
A12
VCC
A13
A6
DQ20
DQ28
DQ21
DQ29
DQ22
DQ30
DQ23
DQ31
VSS
A18
A19
NC
NC
A-A19
Address Inputs
E1-E4
Chip Enables
W
Write Enable
G
Output Enable
DQ-DQ35
Common Data
Input/Output
VCC
Power (+5V10%)
VSS
Ground
NC
No Connection
2
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 1A
ECO #15432
EDI9G361024C
ABSOLUTE MAXIMUM RATINGS*
RECOMMENDED DC OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS
CAPACITANCE
TRUTH TABLE
(f=1.0MHz, VIN=VCC or VSS)
AC TEST CONDITIONS
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions greater than those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
*Typical: TA = 25C, VCC = 5.0V
These parameters are sampled, not 100% tested.
Parameter
Sym
Min
Typ
Max
Units
Supply Voltage
VCC
4.5
5.0
5.5
V
Supply Voltage
VSS
0
0
0
V
Input High Voltage
VIH
2.2
--
6.0
V
Input Low Voltage
VIL
-0.3
--
0.8
V
Input Pulse Levels
VSS to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Levels
1.5V
Output Load
1TTL, CL = 30pF
Parameter
Sym
Conditions
Min
Typ
Max
Units
Operating Power Supply Current
ICC1
W, E = VIL, II/O = 0mA, Min Cycle
1440
mA
Standby (TTL) Power Supply Current
ICC2
E > VIH, VIN < VIL or VIN > VIH
540
mA
Full Standby Power Supply Current
ICC3
E > VCC-0.2V
90
mA
CMOS
VIN > VCC-0.2V or VIN < 0.2V
Input Leakage Current
ILI
VIN = 0V to VCC
--
--
80
A
Output Leakage Current
ILO
V I/O = 0V to VCC
--
--
20
A
Output High Voltage
VOH
IOH = -4.0mA
2.4
--
--
V
Output Low Voltage
VOL
IOL = 8.0mA
--
--
0.4
V
Parameter
Sym
Max
Unit
Address Lines
CI
60
pF
Data Lines
CD/Q
20
pF
Chip Enable Line
CC
20
pF
Write Line
CN
60
pF
E
W
G
Mode
Output
Power
H
X
X
Standby
HIGH Z
ICC2/ICC3
L
H
L
Read
DOUT
ICC1
L
L
X
Write
DIN
ICC1
Output
L
H
H
Deselect
HIGH Z
ICC1
Voltage on any pin relative to VSS
-0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial
0C to +70C
Industrial
-40C to +85C
Storage Temperature, Plastic
-55C to +125C
Power Dissipation
11.6 Watts
Output Current
20 mA
3
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 1A
ECO #15432
EDI9G361024C
AC CHARACTERISTICS READ CYCLE
READ CYCLE 2 - W HIGH
Note 1: Parameter guaranteed, but not tested.
READ CYCLE 1 - W HIGH, G, E LOW
Symbol
15ns
20ns
25ns
Parameter
JEDEC
Alt.
Min Max
Min
Max Min
Max
Units
Read Cycle Time
TAVAV
TRC
15
20
25
ns
Address Access Time
TAVQV
TAA
15
20
25
ns
Chip Enable Access
TELQV TACS
15
20
25
ns
Chip Enable to Output in Low Z (1)
TELQX TCLZ
3
3
3
ns
Chip Disable to Output in High Z (1)
TEHQZ TCHZ
7
10
12
ns
Output Hold from Address Change
TAVQX TOH
3
3
3
ns
Output Enable to Output Valid
TGLQV TOE
8
8
10
ns
Output Enable to Output in Low Z (1)
TGLQX TOLZ
0
0
0
ns
Output Disable to Output in High Z(1)
TGHQZ TOHZ
7
8
10
ns
FIG. 2
FIG. 3
ADDRESS 1
ADDRESS 2
TAVAV
DATA 1
DATA 2
TAVQV
TAVQX
9G361024C Rd Cyc1
A
Q
TGHQZ
TELQV
TELQX
E
G
Q
TEHQZ
A
TAVAV
TGLQV
TGLQX
TAVQV
9G361024C Rd Cyc2
4
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 1A
ECO #15432
EDI9G361024C
Note 1: Parameter guaranteed, but not tested.
WRITE CYCLE 1 - W CONTROLLED
AC CHARACTERISTICS WRITE CYCLE
Symbol
15ns
20ns
25ns
Parameter
JEDEC
Alt.
Min Max Min
Max Min
Max Units
Write Cycle Time
TAVAV TWC
15
20
25
ns
Chip Enable to End of Write
TELWH TCW
12
15
20
ns
TWLEH TCW
12
15
20
ns
Address Setup Time
TAVWL
TAS
0
0
0
ns
TAVEL
TAS
0
0
0
ns
Address Valid to End of Write
TAVWH TAW
12
15
20
ns
TAVEH TAW
12
15
20
ns
Write Pulse Width
TWLWH TWP
12
15
20
ns
TELEH TWP
12
15
20
ns
Write Recovery Time
TWHAX TWR
0
0
0
ns
TEHAX TWR
0
0
0
ns
Data Hold Time
TWHDX TDH
3
3
0
ns
TEHDX TDH
3
3
0
ns
Write to Output in High Z (1)
TWLQZ TWHZ
0
8
0
8
0
12
ns
Data to Write Time
TDVWH TDW
10
12
15
ns
TDVEH TDW
10
12
15
ns
Output Active from End of Write (1)
TWHQX TWLZ
3
3
3
ns
FIG. 4
E
A
TAVAV
TELWH
TAVWH
TWLWH
TAVWL
TWHAX
W
HIGH Z
DATA VALID
TWLQZ
TWHQX
TDVWH
TWHDX
Q
D
9G361024C Write Cyc1
5
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 1A
ECO #15432
EDI9G361024C
WRITE CYCLE 2 - E CONTROLLED
ORDERING INFORMATION
PACKAGE DESCRIPTION
PACKAGE NO. 402: 72 LEAD SIMM
FIG. 5
Part Number
Speed
Package
(ns)
No.
EDI9G361024C15MNC
15
402
EDI9G361024C20MNC
20
402
EDI9G361024C25MNC
25
402
A
TAVEL
HIGH Z
TAVAV
9G361024C Write Cyc2
TELEH
E
TAVEH
TEHAX
W
TWLEH
TEHDX
TDVEH
Q
DATA VALID
D
0.050 TYP.
0.250
0.250
0.062 R. (2x)
0.400
0.125 DIA.
(2x)
3.750
2.045
1.992
P1
MAX.
MIN.
3.984
0.125
P1
1.045
0.360
4.250
MAX.
0.225
MIN.
9G361024C Pkg.
ALL DIMENSIONS ARE IN INCHES
PDF 
ZIP