1
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 0
ECO #15456
WED3DG7265V-D1
512MB- 64Mx72 SDRAM, UNBUFFERED W/PLL
n Burst Mode Operation
n Auto and Self Refresh capability
n LVTTL compatible inputs and outputs
n Serial Presence Detect with EEPROM
n Fully synchronous: All signals are registered on the positive
edge of the system clock
n Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
n 3.3 volt 6 0.3v Power Supply
n 144 Pin SO-DIMM JEDEC
The WED3DG7265V is a 64Mx72 synchronous DRAM module
which consists of nine 64Mx8 DDP SDRAM components in
TSOP- 11 package, and one 2K EEPROM in an 8- pin TSSOP
package for Serial Presence Detect which are mounted on a 144
Pin SO-DIMM multilayer FR4 Substrate.
DESCRIPTION
FEATURES
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
PIN NAMES
* These pins are not used in this module.
** These pins should be NC in the system which
does not support SPD.
* This datasheet describes a product that may or may not be under development
and is subject to change or cancellation without notice.
A0 A12Address input (Multiplexed)
BA0-1
Select Bank
DQ0-63
Data Input/Output
CLK0
Clock input
CBO-7
Check bit (Data-In/Data-Out)
CKE0, CKE1
Clock Enable input
CS0, CS1
Chip select Input
RAS
Row Address Strobe
CAS
Column Address Strobe
WE
Write Enable
DQM0-7
DQM
VDD
Power Supply (3.3V)
VSS
Ground
SDA
Serial data I/O
SCL
Serial clock
DNU
Do not use
NC
No Connect
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White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 0
ECO #15456
WED3DG7265V-D1
FUNCTIONAL BLOCK DIAGRAM
3
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 0
ECO #15456
WED3DG7265V-D1
(Voltage Referenced to: V
SS
= 0V, T
A
= 0C to +70C)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Units
Voltage on any pin relative to VSS
V
IN
, Vout
-1.0 ~ 4.6
V
Voltage on VDD supply relative to VSS
VDD, VDDQ
-1.0 ~ 4.6
V
Storage Temperature
TSTG
-55 ~ +150 C
Power Dissipation
PD
9
W
Short Circuit Current
IOS
50
mA
Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply Voltage
VDD
3.0
3.3
3.6
V
Input High Voltage
VIH
2.0
3.0 VDDQ+0.3 V
1
Input Low Voltage
VIL
-0.3
0.8
V
2
Output High Voltage
VOH
2.4
V
IOH= -2mA
Output Low Voltage
VOL
0.4
V
IOL= -2mA
Input Leakage Current
ILI
-10
10
A
3
Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is 3ns.
2. VIL (min)= -2.0V AC. The undershoot voltage duration is 3ns.
3. Any input 0V VIN VDDQ
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State
outputs.
CAPACITANCE
(T
A
= 23C, f = 1MHz, V
DD
= 3.3V, VREF=1.4V 6200mV)
Parameter
Symbol
Min
Max
Unit
Input Capacitance (A0-A12)
CIN1
-
15
pF
Input Capacitance (RAS,CAS,WE)
CIN2
-
15
pF
Input Capacitance (CKE0)
CIN3
-
15
pF
Input Capacitance (CLK0)
CIN4
-
20
pF
Input Capacitance (CS0)
CIN5
-
15
pF
Input Capacitance (DQM0-DQM7)
CIN6
-
15
pF
Input Capacitance (BA0-BA1)
CIN7
-
15
pF
Data input/output capacitance (DQ0-DQ63)
Cout
-
22
pF
Data input/output capacitance (CB0-7)
Cout 1
-
22
pF
4
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 0
ECO #15456
WED3DG7265V-D1
OPERATING CURRENT CHARACTERISTICS
(V
CC
= 3.3V, T
A
= 0C to +70C)
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VDDQ/VssQ)
Version
Parameter
Symbol
Conditions
133
100
Units Note
Operating Current
ICC1
Burst Length = 1
1,530
1,440
mA
1
(One bank active)
tRC tRC(min)
IOL = 0mA
Precharge Standby Current
ICC2P
CKE VIL(max), tCC = 10ns
50
mA
in Power Down Mode
ICC2PS
CKE & CLK VIL(max), tCC =
50
Icc2N
CKE VIH(min), CS VIH(min), tcc = 10ns
Precharge Standby Current
Input signals are charged one time during 20 370
in Non-Power Down Mode
Icc2NS
CKE VIH(min), CLK VIL(max), tcc =
mA
Input signals are stable
200
Active standby current in
ICC3P
CKE VIL(max), tCC = 10ns
80
mA
power-down mode
ICC3PS
CKE & CLK VIL(max), tcc =
80
ICC3N
CKE VIH(min), CS VIH(min), tcc = 10ns
Active standby current in
Input signals are changed one time during 20ns 550
mA
non power-down mode
ICC3NS
CKE VIH(min), CLK VIL(max), tcc =
input signals are stable
410
mA
Io = mA
Operating current (Burst mode)
ICC4
Page burst
2,070
1,620
mA
1
4 Banks activated
tCCD = 2CLK
Refresh current
ICC5
tRC tRC(min)
3,150
2,880
mA
2
Self refresh current
ICC6
CKE 0.2V
60
mA
5
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 0
ECO #15456
WED3DG7265V-D1
ALL DIMENSIONS ARE IN INCHES
PACKAGE DIMENSIONS
Ordering Information
Speed
Cas Latency
WED3DG7265V10D1
100MHz
CL=2
WED3DG7265V7D1
133MHz
CL=2
WED3DG7265V75D1
133MHz
CL=3
PLL
6
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 0
ECO #15456
WED3DG7265V-D1
REV.
DATE
REQUESTED BY
DETAILS
A
4-8-02
PAUL MARIEN
CREATED
B
5-6-02
PAUL MARIEN
-MAKE CORRECTIONS TO
THE PINOUT
-MAKE CORRECTIONS TO
THE PACKAGE DRAWING
-CHANGE THE BLOCK
DIAGRAM
0
9-11-02
PAUL MARIEN
-CHANGE FROM ADVANCED
TO FINAL
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