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Электронный компонент: WF4M32S-120

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1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
RESET
CS
2
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
A
19
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
A
17
WE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
A
21
A
13
A
8
I/O
16
I/O
17
I/O
18
V
CC
CS
4
NC
I/O
27
A
4
A
5
A
6
A20
CS
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
August 2002 Rev. 4
I/O
0-31
Data Inputs/Outputs
A
0-21
Address Inputs
WE
Write Enables
CS
1-4
Chip Selects
OE
Output Enable
V
CC
Power Supply
GND
Ground
RESET
Reset
F
IG
. 1 P
IN
C
ONFIGURATION
F
OR
WF4M32-XH2X5
P
IN
D
ESCRIPTION
T
OP
V
IEW
4MX32 5V FLASH MODULE, SMD 5962-97612 (pending)
FEATURES
n Access Times of 100, 120, 150ns
n Packaging:
66 pin, PGA Type, 1.385" square, Hermetic
C e r a m i c H I P ( P a c k a g e 4 0 2 ) .
68 lead, 40mm Low Profile CQFP ( Package
502 ), 3.5mm (0.140") height.
68 lead, Hermetic CQFP (G2T), 22.4mm
(0.880") square (Package 509) 4.57mm
(0.180") height. Designed to fit JEDEC 68
lead 0.990CQFJ footprint (Fig. 3)
n Sector Architecture
32 equal size sectors of 64KBytes per each
2Mx8 chip
Any combination of sectors can be erased. Also
supports full chip erase.
n Minimum 100,000 Write/Erase Cycles Minimum
B
LOCK
D
IAGRAM
n Organized as 4Mx32
n User configurable as 8Mx16 or 16Mx8 in HIP and
G4T packages.
n Commercial, Industrial, and Military Temperature Ranges
n 5 Volt Read and Write. 5V 10% Supply.
n Low Power CMOS
n Data Polling and Toggle Bit feature for detection of
program or erase cycle completion.
n Supports reading or programming data to a sector
not being erased.
n RESET pin resets internal state machine to the read
mode.
n Built-in Decoupling Caps and Multiple Ground
Pins for Low Noise Operation, Separate Power
and Ground Planes to improve noise immunity
PRELIMINARY*
*This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
Note:
For programming information refer to Flash Programming 16M5 Application Note.
I / O 0 - 7
CS1
I / O 8 - 1 5
CS2
I / O 1 6 - 2 3
CS3
I / O 2 4 - 3 1
CS
O E
A 0 - 2 0
4
A 2 1
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2Mx 8
2M x 8
2M x 8
W E
RESET
2
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WF4M32-XXX5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
2
OE
CS
4
A
17
A
18
A
19
A
20
A21
RESET
NC
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
1
GND
CS
3
WE
A
6
A
7
A
8
A
9
A
10
V
CC
P
IN
D
ESCRIPTION
F
IG
. 2 P
IN
C
ONFIGURATION
F
OR
WF4M32-XG4TX5
I/O
0-31
Data Inputs/Outputs
A
0-21
Address Inputs
WE
Write Enable
CS
1-4
Chip Selects
OE
Output Enable
V
CC
Power Supply
RESET
Reset
GND
Ground
NC
Not Connected
T
OP
V
IEW
P
IN
D
ESCRIPTION
F
IG
. 3 P
IN
C
ONFIGURATION
F
OR
WF4M32-XG2TX5
T
OP
V
IEW
The White 68 lead G2T CQFP
fills the same fit and function
as the JEDEC 68 lead CQFJ or
68 PLCC. But the G2T has the
TCE and lead inspection
advantage of the CQFP form.
I/O
0-31
Data Inputs/Outputs
A
0-20
Address Inputs
WE
Write Enables
CS
1-2
Banks Selects
OE
Output Enable
V
CC
Power Supply
GND
Ground
RESET
Reset
B
LOCK
D
IAGRAM
B
LOCK
D
IAGRAM
Note: CS1& CS2 are used as bank select
I / O
0 - 7
CS
1
I / O
8 - 1 5
CS
2
I / O
1 6 - 2 3
CS
3
I / O
2 4 - 3 1
CS
O E
A
0 - 2 0
4
A
2 1
2M
x 8
2M x 8
W E
RESET
2M
x 8
2M x 8
2M
x 8
2M x 8
2M
x 8
2M x 8
BUFFER
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
1
OE
CS
2
A
17
NC
NC
NC
A
18
A
19
A
20
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
RESET
A
0
A
1
A
2
A
3
A
4
A
5
NC
GND
NC
WE
A
6
A
7
A
8
A
9
A
10
V
CC
2M x 8
8
I / O
0 - 7
CS1
I / O
8 - 1 5
CS2
I / O
1 6 - 2 3
I / O
2 4 - 3 1
A 0 - 2 0
O E
W E
R E S E T
2M x 8
2M x 8
8
2M x 8
2M x 8
8
2M x 8
2M x 8
8
2M x 8
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
Parameter
Symbol
Conditions
HIP
G2T
G4T
Unit
Min
Max
Min
Max
Min
Max
Input Leakage Current
I
LI
V
CC
= 5.5, V
IN
= GND to V
CC
10
10
10
A
Output Leakage Current
I
LOx32
V
CC
= 5.5, V
IN
= GND to V
CC
10
10
10
A
V
CC
Active Current for Read (1)
I
CC1
CS = V
IL
, OE = V
IH
, f = 5MHz
320
215
345
mA
V
CC
Active Current for Program
I
CC2
CS = V
IL
, OE = V
IH
420
295
445
mA
or Erase (2)
V
CC
Standby Current
I
CC3
V
CC
= 5.5, CS = V
IH
, f = 5MHz, RESET = V
IH
20
2.0
95
mA
Output Low Voltage
V
OL
I
OL
= 12.0 mA, V
CC
= 4.5
0.45
0.45
0.45
V
Output High Voltage
V
OH
I
OH
= -2.5 mA, V
CC
= 4.5
0.85 x
0.85 x
0.85 x
V
Vcc
Vcc
Vcc
Low V
CC
Lock-Out Voltage
V
LKO
3.2
4.2
3.2
4.2
3.2
4.2
V
Parameter
Symbol HIP (H2) CQFP (G2T) CQFP( G4T)
OE capacitance
C
OE
75
75
20
WE capacitance
C
WE
75
75
20
CS capacitance
C
CS
20
50
20
Data I/O capacitance
C
I/O
30
30
30
Address input capacitance
C
AD
75
75
20
This parameter is guaranteed by design but not tested.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Parameter
Symbol
Ratings
Unit
Voltage on Any Pin Relative to V
SS
V
T
-2.0 to +7.0
V
Power Dissipation
P
T
8
W
Storage Temperature
Tstg
-65 to +125
C
Short Circuit Output Current
I
OS
100
mA
Endurance - Write/Erase Cycles
100,000 min
cycles
(Mil Temp)
Data Retention (Mil Temp)
20
years
R
ECOMMENDED
DC O
PERATING
C
ONDITIONS
Parameter
Symbol Min
Typ
Max
Unit
Supply Voltage
V
CC
4.5
5.0
5.5
V
Ground
V
SS
0
0
0
V
Input High Voltage
V
IH
2.0
-
V
CC
+ 0.5
V
Input Low Voltage
V
IL
-0.5
-
+0.8
V
Operating Temperature (Mil.)
T
A
-55
-
+125
C
Operating Temperature (Ind.)
T
A
-40
-
+85
C
DC C
HARACTERISTICS
- CMOS C
OMPATIBLE
(VCC = 5.0V, GND = 0V, TA = -55C
TO
+125C)
N O T E S :
1. The Icc current listed includes both the DC operating current and the frequency dependent component (@ 5MHz). The
frequency component typically is less than 2mA/MHz, with OE at V
IH
.
2. Icc active while Embedded Algorithm (program or erase) is in progress.
3. DC test conditions V
IL
= 0.3V, V
IH
= V
CC
- 0.3V
C
APACITANCE
(
P
F)
(TA = +25C, V
IN
= OV,
F
= 1.0MH
Z
)
HIP =
66 pin, PGA Type, 1.385" square, Hermetic
Ceramic HIP (Package 402).
G2T = 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880")
square. Designed to fit JEDEC 68 lead 0.990" CQFJ
footprint (Fig. 3) (Package 509)
G4T = 68 lead, 40mm Low Profile CQFP, 3.5mm (0.140")
(Package 502 )
4
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WF4M32-XXX5
AC C
HARACTERISTICS
F
OR
G2T P
ACKAGE
W
RITE
/E
RASE
/P
ROGRAM
O
PERATIONS
- WE C
ONTROLLED
(VCC = 5.0V, TA = -55C
TO
+125C)
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
AVAV
t
WC
100
120
150
ns
Chip Select Setup Time
t
ELWL
t
CS
0
0
0
ns
Write Enable Pulse Width
t
WLWH
t
WP
45
50
50
ns
Address Setup Time
t
AVWL
t
AS
0
0
0
ns
Data Setup Time
t
DVWH
t
DS
45
50
50
ns
Data Hold Time
t
WHDX
t
DH
0
0
0
ns
Address Hold Time
t
WLAX
t
AH
45
50
50
ns
Write Enable Pulse Width High
t
WHWL
t
WPH
20
20
20
ns
Duration of Byte Programming Operation (1)
t
WHWH1
300
300
300
s
Sector Erase (2)
t
WHWH2
15
15
15
sec
Read Recovery Time before Write
t
GHWL
0
0
0
s
V
CC
Setup Time
t
VCS
5 0
5 0
5 0
s
Chip Programming Time
44
44
44
sec
Chip Erase Time (3)
256
256
256
sec
Output Enable Hold Time (4)
t
OEH
10
10
10
ns
RESET Pulse Width
t
RP
500
500
500
ns
NOTES:
1. Typical value for tWHWH1 is 7s.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
AC C
HARACTERISTICS
F
OR
G2T P
ACKAGE
R
EAD
-O
NLY
O
PERATIONS
(VCC = 5.0V, TA = -55C
TO
+125C)
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
A V A V
t
RC
100
120
150
ns
Address Access Time
t
AVQV
t
A C C
100
120
150
ns
Chip Select Access Time
t
ELQV
t
CE
100
120
150
ns
Output Enable to Output Valid
t
GLQV
t
OE
4 0
5 0
5 5
ns
Chip Select High to Output High Z (1)
t
EHQZ
t
DF
20
30
35
ns
Output Enable High to Output High Z (1)
t
GHQZ
t
DF
20
30
35
ns
Output Hold from Addresses, CS or OE Change,
t
A X Q X
t
OH
0
0
0
ns
whichever is First
RST Low to Read Mode (1)
t
R e a d y
20
20
20
s
1. Guaranteed by design, not tested.
5
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
AC C
HARACTERISTICS
F
OR
G2T P
ACKAGE
W
RITE
/E
RASE
/P
ROGRAM
O
PERATIONS
,CS C
ONTROLLED
(VCC = 5.0V, GND = 0V, TA = -55C
TO
+125C)
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
AVAV
t
WC
100
120
150
ns
Write Enable Setup Time
t
WLEL
t
WS
0
0
0
ns
Chip Select Pulse Width
t
ELEH
t
CP
45
50
50
ns
Address Setup Time
t
AVEL
t
AS
0
0
0
ns
Data Setup Time
t
DVEH
t
DS
45
50
50
ns
Data Hold Time
t
EHDX
t
DH
0
0
0
ns
Address Hold Time
t
ELAX
t
AH
45
50
50
ns
Chip Select Pulse Width High
t
EHEL
t
CPH
20
20
20
ns
Duration of Byte Programming Operation (1)
t
WHWH1
300
300
300
s
Sector Erase Time (2)
t
WHWH2
15
15
15
sec
Read Recovery Time
t
GHEL
0
0
0
s
Chip Programming Time
44
44
44
sec
Chip Erase Time (3)
256
256
256
sec
Output Enable Hold Time (4)
t
OEH
10
10
10
ns
N O T E S :
1. Typical value for tWHWH1 is 7s.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
6
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WF4M32-XXX5
AC C
HARACTERISTICS
F
OR
G4T A
ND
H2 P
ACKAGES
W
RITE
/E
RASE
/P
ROGRAM
O
PERATIONS
- WE C
ONTROLLED
(VCC = 5.0V, TA = -55C
TO
+125C)
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
AVAV
t
WC
100
120
150
ns
Chip Select Setup Time
t
ELWL
t
CS
0
0
0
ns
Write Enable Pulse Width
t
WLWH
t
WP
45
50
50
ns
Address Setup Time
t
AVWL
t
AS
0
0
0
ns
Data Setup Time
t
DVWH
t
DS
45
50
50
ns
Data Hold Time
t
WHDX
t
DH
15
15
15
ns
Address Hold Time (1)
t
WLAX
t
AH
45
50
50
ns
Write Enable Pulse Width High (2)
t
WHWL
t
WPH
20
20
20
ns
Duration of Byte Programming Operation (3)
t
WHWH1
300
300
300
s
Sector Erase (4)
t
WHWH2
15
15
15
sec
Read Recovery Time before Write
t
GHWL
0
0
0
s
V
CC
Setup Time
t
VCS
5 0
5 0
5 0
s
Chip Programming Time
44
44
44
sec
Chip Erase Time (5)
256
256
256
sec
Output Enable Hold Time (6)
t
OEH
10
10
10
ns
RESET Pulse Width
t
RP
500
500
500
ns
N O T E S :
1. A21 must be held constant until WE or CS go high, whichever occurs first.
2. Guaranteed by design, but not tested.
3. Typical value for tWHWH1 is 7s.
4. Typical value for tWHWH2 is 1sec.
5. Typical value for Chip Erase Time is 32sec.
6. For Toggle and Data Polling.
AC C
HARACTERISTICS
F
OR
G4T
AND
H2 P
ACKAGES
R
EAD
-O
NLY
O
PERATIONS
(VCC = 5.0V, TA = -55C
TO
+125C)
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
AVAV
t
RC
100
120
150
ns
Address Access Time
t
AVQV
t
ACC
100
120
150
ns
Chip Select Access Time
t
ELQV
t
CE
100
120
150
ns
Output Enable to Output Valid
t
GLQV
t
OE
50
50
55
ns
Chip Select High to Output High Z
t
EHQZ
t
DF
40
45
45
ns
Output Enable High to Output High Z
t
GHQZ
t
DF
40
45
45
ns
Output Hold from Addresses, CS or OE Change,
t
AXQX
t
OH
0
0
0
ns
whichever is First
RST Low to Read Mode
t
Ready
20
20
20
s
7
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
AC C
HARACTERISTICS
F
OR
G4T A
ND
H2 P
ACKAGES
W
RITE
/E
RASE
/P
ROGRAM
O
PERATIONS
,CS C
ONTROLLED
(VCC = 5.0V, GND = 0V, TA = -55C
TO
+125C)
F
IG
. 4 AC T
EST
C
IRCUIT
AC T
EST
C
ONDITIONS
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75
W.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
Parameter
Typ
Unit
Input Pulse Levels
V
IL
= 0, V
IH
= 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
AVAV
t
WC
100
120
150
ns
Write Enable Setup Time
t
WLEL
t
WS
0
0
0
ns
Chip Select Pulse Width
t
ELEH
t
CP
45
50
50
ns
Address Setup Time
t
AVEL
t
AS
0
0
0
ns
Data Setup Time
t
DVEH
t
DS
45
50
50
ns
Data Hold Time
t
EHDX
t
DH
15
15
15
ns
Address Hold Time (1)
t
ELAX
t
AH
45
50
50
ns
Chip Select Pulse Width High
t
EHEL
t
CPH
20
20
20
ns
Duration of Byte Programming Operation (2)
t
WHWH1
300
300
300
s
Sector Erase Time (3)
t
WHWH2
15
15
15
sec
Read Recovery Time
t
GHEL
0
0
0
s
Chip Programming Time
44
44
44
sec
Chip Erase Time (4)
256
256
256
sec
Output Enable Hold Time (5)
t
OEH
10
10
10
ns
N O T E S :
1. A21 must be held constant until WE or CS go high, whichever occurs first.
2. Typical value for tWHWH1 is 7s.
3. Typical value for tWHWH2 is 1sec.
4. Typical value for Chip Erase Time is 32sec.
5. For Toggle and Data Polling.
F
IG
. 5 R
ESET
T
IMING
D
IAGRAM
RESET
t
RP
t
Ready
8
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WF4M32-XXX5
F
IG
. 6 AC W
AVEFORMS
F
OR
R
EAD
O
PERATIONS
9
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White Electronic Designs
WF4M32-XXX5
N O T E S :
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D
7
is the output of the complement of the data written to each chip.
4. D
OUT
is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
F
IG
. 7 W
RITE
/E
RASE
/P
ROGRAM
O
PERATION
, WE C
ONTROLLED
10
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WF4M32-XXX5
F
IG
. 8 AC W
AVEFORMS
C
HIP
/S
ECTOR
E
RASE
O
PERATIONS
N O T E :
1. SA is the sector address for Sector Erase.
11
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
F
IG
. 9 AC W
AVEFORMS
F
OR
D
ATA
P
OLLING
D
URING
E
MBEDDED
A
LGORITHM
O
PERATIONS
CS
OE
WE
t
OE
t
CE
t
CH
t
OH
D7
D7 =
Valid Data
High Z
D0-D6 = Invalid
D0-D7
Valid Data
t
DF
D7
D0-D6
t
OEH
t
WHWH 1 or 2
Data
12
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WF4M32-XXX5
Notes:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D
7
is the output of the complement of the data written to each chip.
4. D
OUT
is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
F
IG
. 10 A
LTERNATE
CS C
ONTROLLED
P
ROGRAMMING
O
PERATION
T
IMINGS
13
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
P
ACKAGE
402: 66 P
IN
, PGA T
YPE
, C
ERAMIC
H
EX
-I
N
-L
INE
P
ACKAGE
, H
IP
(H2)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETIC ALLY IN INCHES
P
ACKAGE
502: 68 L
EAD
, C
ERAMIC
Q
UAD
F
LAT
P
ACK
, L
OW
P
ROFILE
CQFP (G4T)
14
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WF4M32-XXX5
P
ACKAGE
509: 68 L
EAD
, C
ERAMIC
Q
UAD
F
LAT
P
ACK
, CQFP (G2T)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
The White 68 lead G2T CQFP
fills the same fit and function
as the JEDEC 68 lead CQFJ or
68 PLCC. But the G2T has the
TCE and lead inspection
advantage of the CQFP form.
15
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
DEVICE TYPE
SECTOR SIZE S P E E D
P A C K A G E
SMD NO.
4M x 32 5V Flash Module
6 4 K B y t e
150ns
66 pin HIP (H2)
5962-97612 01HXX*
4M x 32 5V Flash Module
6 4 K B y t e
120ns
66 pin HIP (H2)
5962-97612 02HXX*
4M x 32 5V Flash Module
6 4 K B y t e
100ns
66 pin HIP (H2)
5962-97612 03HXX*
4M x 32 5V Flash Module
6 4 K B y t e
150ns
68 lead CQFP Low Profile (G4T)
5962-97612 01HXX*
4M x 32 5V Flash Module
6 4 K B y t e
120ns
68 lead CQFP Low Profile (G4T)
5962-97612 02HXX*
4M x 32 5V Flash Module
6 4 K B y t e
100ns
68 lead CQFP Low Profile (G4T)
5962-97612 03HXX*
4M x 32 5V Flash Module
6 4 K B y t e
150ns
68 lead CQFP Low Profile (G2T)
5962-97612 01HXX*
4M x 32 5V Flash Module
6 4 K B y t e
120ns
68 lead CQFP Low Profile (G2T)
5962-97612 02HXX*
4M x 32 5V Flash Module
6 4 K B y t e
100ns
68 lead CQFP Low Profile (G2T)
5962-97612 03HXX*
O
RDERING
I
NFORMATION
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
V
PP
PROGRAMMING VOLTAGE
5 = 5 V
DEVICE GRADE:
M =Military Screened
-55C to +125C
I =Industrial
-40C to +85C
C =Commercial
0C to +70C
PACKAGE TYPE:
H 2 = Ceramic Hex In line Package, HIP (Package 402)
G4T = 40mm Low Profile CQFP (Package 502)
G2T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 509)
ACCESS TIME (ns)
ORGANIZATION, 4M x 32
User configurable as 8M x 16 or 16M x 8 in HIP and G4T packages
F L A S H
WHITE ELECTRONIC DESIGNS CORP.
W F 4M32 - XXX X X 5 X
*Pending