1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
WE
2
#
CS
2
#
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
#
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
17
WE
1
#
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
NC
A
13
A
8
I/O
16
I/O
17
I/O
18
V
CC
CS
4
#
WE
4
#
I/O
27
A
4
A
5
A
6
WE
3
#
CS
3
#
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
FEATURES
Access Times of 60, 70, 90, 120, 150ns
Packaging
66 pin, PGA Type, 1.075" square, Hermetic
Ceramic HIP (Package 400
(1)
).
68 lead, 40mm, Low Capacitance Hermetic
CQFP (Package 501)
1
68 lead, 40mm, Low Profi le 3.5mm (0.140"),
CQFP (Package 502)
1
68 lead, 22.4mm (0.880") Low Profi le CQFP
(G2U) 3.5mm (0.140") high, (Package 510)
1
68 lead, 22.4mm (0.880") CQFP (G2L) 5.08mm
(0.200") high, Package (528)
1,000,000 Erase/Program Cycles Minimum
Sector Architecture
8 equal size sectors of 64KBytes each
Any combination of sectors can be concurrently
erased. Also supports full chip erase
Organized as 512Kx32
Pin Description
Block Diagram
FIGURE 1 PIN CONFIGURATION FOR WF512K32N-XH1X5
512Kx32 5V FLASH MODULE, SMD 5962-94612
Top View
WE
1
# CS
1
#
CS
2
#
CS
3
#
CS
4
#
WE
4
#
WE
3
#
WE
2
#
512K x 8
512K x 8
512K x 8
512K x 8
OE#
A
0-18
I/O
0-7
I/O
24-31
I/O
16-23
I/O
8-15
8
8
8
8
Commercial, Industrial and Military Temperature
Ranges
5 Volt Programming. 5V 10% Supply.
Low Power CMOS, 6.5mA Standby
Embedded Erase and Program Algorithms
TTL Compatible Inputs and CMOS Outputs
Built-in Decoupling Caps for Low Noise Operation
Page
Program
Operation
and
Internal
Program
Control Time
Weight
WF512K32 - XG2UX5 - 8 grams typical
WF512K32N - XH1X5 - 13 grams typical
WF512K32 - XG4TX5
1
- 20 grams typical
WF512K32-XG2LX5 - 8 grams typical
* This product is subject to change without notice.
Note 1: Package Not Recommended for New Design
See Flash Programming Application Note 4M5 for algorithms.
I/O
0-31
Data Inputs/Outputs
A
0-18
Address Inputs
WE
1-4
#
Write Enables
CS
1-4
#
Chip Selects
OE#
Output Enable
V
CC
Power Supply
GND Ground
NC
Not Connected
2
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
Pin Description
FIGURE 2 PIN CONFIGURATION FOR WF512K32-XG4TX5
1
Block Diagram
Top View
FIGURE 3 PIN CONFIGURATION FOR WF512K32-XG2UX5 AND WF512K32-XG2LX5
Pin Description
Top View
Block Diagram
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
2
#
OE#
CS
4
#
A
17
A
18
NC
NC
NC
NC
NC
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
1
#
GND
CS
3
#
WE#
A
6
A
7
A
8
A
9
A
10
V
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9 8 7 6 5 4 3 2 1 68 67
66 65
64
63
62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
512K X 8
8
8
8
8
512K X 8
512K X 8
512K X 8
WE#
OE#
A
0-18
CS
1
#
CS
2
#
CS
3
#
CS
4
#
I/O
0 - 7
I/O
8 - 15
I/O
16 - 23
I/O
24 - 31
WE
1
# CS
1
#
CS
2
#
CS
3
#
CS
4
#
WE
4
#
WE
3
#
WE
2
#
512K x 8
512K x 8
512K x 8
512K x 8
OE#
A
0-18
I/O
0-7
I/O
24-31
I/O
16-23
I/O
8-15
8
8
8
8
Note 1: Package not recommended for new designs
I/O
0-31
Data Inputs/Outputs
A
0-18
Address Inputs
WE
1-4
#
Write Enables
CS
1-4
#
Chip Selects
OE#
Output Enable
V
CC
Power Supply
GND Ground
NC
Not Connected
I/O
0-31
Data Inputs/Outputs
A
0-18
Address Inputs
WE#
Write Enables
CS
1-4
#
Chip Selects
OE#
Output Enable
V
CC
Power Supply
GND Ground
NC
Not Connected
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
1
#
OE#
CS
2
#
A
17
WE
2
#
WE
3
#
WE
4
#
A
18
NC
NC
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
3
#
GND
CS
4
#
WE
1
#
A
6
A
7
A
8
A
9
A
10
V
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9
8 7
6 5
4
3 2
1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
3
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
Absolute Maximum Ratings (1)
NOTES:
1. Stresses above the absolute maximum rating may cause permanent damage to the
device. Extended operation at the maximum levels may degrade performance and
affect reliability.
2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,inputs
may overshoot Vss to -2.0 V for periods of up to 20ns. Maximum DC voltage on
output and I/O pins is Vcc + 0.5V. During voltage transitions, outputs may overshoot
to Vcc + 2.0 V for periods of up to 20ns.
3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9 may
overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9 is
+13.5V which may overshoot to 14.0 V for periods up to 20ns.
Parameter
Unit
Operating Temperature
-55 to +125
C
Supply Voltage Range (V
CC
)
-2.0 to +7.0
V
Signal voltage range (any pin except A9) (2)
-2.0 to +7.0
V
Storage Temperature Range
-65 to +150
C
Lead Temperature (soldering, 10 seconds)
+300
C
Data Retention (Mil Temp)
20 years
Endurance - write/erase cycles (Mil Temp)
1,000,000 cycles min.
A9 Voltage for sector protect (V
ID
) (3)
-2.0 to +14.0
V
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Supply Voltage
V
CC
4.5
5.5
V
Input High Voltage
V
IH
2.0
V
CC
+ 0.5
V
Input Low Voltage
V
IL
-0.5
+0.8
V
Operating Temp. (Mil.)
T
A
-55
+125
C
Operating Temp. (Ind.)
T
A
-40
+85
C
A
9
Voltage for Sector Protect
V
ID
11.5
12.5
V
CAPACITANCE
T
A
= +25C
Parameter
Symbol
Conditions Max Unit
OE# capacitance
C
OE
V
IN
= 0V, f = 1.0 MHz
50
pF
WE
1-4
# capacitance
HIP (PGA)
C
WE
V
IN
= 0V, f = 1.0 MHz
20
pF
CQFP G4T
50
CQFP G2U/G2L
15
CS
1-4
# capacitance
C
CS
V
IN
= 0V, f = 1.0 MHz
20
pF
Data# I/O capacitance
C
I/O
V
I/O
= 0V, f = 1.0 MHz
20
pF
Address input capacitance
C
AD
V
IN
= 0V, f = 1.0 MHz
50
pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
V
CC
= 5.0V, V
SS
= 0V, -55C T
A
+125C
Parameter
Sym
Conditions
Min
Max
Units
Input Leakage Current
I
LI
V
CC
= 5.5, V
IN
= GND to V
CC
10
A
Output Leakage Current
I
LOx32
CS# = V
IH
, OE# = V
IH
, V
OUT
= GND to V
CC
10
A
V
CC
Active Current for Read (1)
I
CC1
CS# = V
IL
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5
190
mA
V
CC
Active Current for Program or Erase (2)
I
CC2
CS# = V
IH
, OE# = V
IH
240
mA
V
CC
Standby Current
I
CC4
V
CC
= 5.5, CS = V
IH
, f = 5MHz
6.5
mA
V
CC
Static Current
I
CC3
V
CC
= 5.5, CS = V
IH
0.6
mA
Output Low Voltage
V
OL
I
OL
= 8.0mA, V
CC
= 4.5
0.45
V
Output High Voltage
V
OH1
I
OH
= 2.5mA, V
CC
= 4.5
0.85
X
V
CC
V
Low V
CC
Lock-Out Voltage
V
LKO
3.2
4.2
V
DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
NOTES:
1. The I
CC
current listed includes both the DC operating current and the frequency dependent component
(at 5 MHz). The frequency component typically is less than 2 mA/MHz, with OE at V
IH
.
2. I
CC
active while Embedded Algorithm (program or erase) is in progress.
4
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED
V
CC
= 5.0V, GND = 0V, -55C T
A
+125C
Parameter
Symbol
-60
-70
-90
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
AVAV
t
WC
60
70
90
120
150
ns
Write Enable Setup Time
t
WLEL
t
WS
0
0
0
0
0
ns
Chip Select Pulse Width
t
ELEH
t
CP
40
45
45
50
50
ns
Address Setup Time
t
AVEL
t
AS
0
0
0
0
0
ns
Data Setup Time
t
DVEH
t
DS
40
45
45
50
50
ns
Data Hold Time
t
EHDX
t
DH
0
0
0
0
0
ns
Address Hold Time
t
ELAX
t
AH
40
45
45
50
50
ns
Chip Select Pulse Width High
t
EHEL
t
CPH
20
20
20 20
20
ns
Duration of Byte Programming Operation (1)
t
WHWH1
300
300
300
300
300
s
Sector Erase Time (2)
t
WHWH2
15
15
15
15
15
sec
Read Recovery Time
t
GHEL
0
0
0
0
0
ns
Chip Programming Time
11
11
11
11
11
sec
Chip Erase Time (3)
64
64
64
64
64
sec
NOTES:
1. Typical value for t
WHWH1
is 7s.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase Time is 8sec.
I
Current Source
D.U.T.
C = 50 pf
eff
I
OL
V
1.5V
(Bipolar Supply)
Z
Current Source
OH
FIGURE. 4 AC TEST CIRCUIT
Notes:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75 .
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC Test Conditions
Parameter
Typ
Unit
Input Pulse Levels
V
IL
= 0, V
IH
= 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
5
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS,WE# CONTROLLED
V
CC
= 5.0V, GND = 0V, -55C T
A
+125C
Parameter
Symbol
-60
-70
-90
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
AVAV
t
WC
60
70
90
120
150
ns
Chip Select Setup Time
t
ELWL
t
CS
0
0
0
0
0
ns
Write Enable Pulse Width
t
WLWH
t
WP
40
45
45
50
50
ns
Address Setup Time
t
AVWH
t
AS
0
0
0
0
0
ns
Data Setup Time
t
DVWH
t
DS
40
45
45
50
50
ns
Data Hold Time
t
WHDX
t
DH
0
0
0
0
0
ns
Address Hold Time
t
WHAX
t
AH
40
45
45
50
50
ns
Write Enable Pulse Width High
t
WHWL
t
WPH
20
20
20
20
20
ns
Duration of Byte Programming Operation (1)
t
WHWH1
300
300
300
300
300
s
Sector Erase Time (2)
t
WHWH2
15
15
15
15
15
sec
Read Recovery Time before Write
t
GHWL
0
0
0
0
0
ns
VCC Set-up Time
t
VCS
50
50
50
50
50
s
Chip Programming Time
11
11
11
11
11
sec
Output Enable Setup Time
t
OES
0
0
0
0
0
ns
Output Enable Hold Time (4)
t
OEH
10
10
10
10
10
ns
Chip Erase Time (3)
64
64
64
64
64
sec
NOTES:
1. Typical value for t
WHWH1
is 7s.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase Time is 8sec.
4. For Toggle and Data Polling.
AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS,WE# CONTROLLED
V
CC
= 5.0V, -55C T
A
+125C
Parameter
Symbol
-60
-70
-90
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
AVAV
t
RC
60
70
90
120
150
ns
Address Access Time
t
AVQV
t
ACC
60
70
90
120
150
ns
Chip Select Access Time
t
ELQV
t
CE
60
70
90
120
150
ns
Output Enable to Output Valid
t
GLQV
t
OE
30
35
35
50
55
ns
Chip Select to Output High Z (1)
t
EHQZ
t
DF
20
20
20
30
35
ns
Output Enable High to Output High Z (1)
t
GHQZ
t
DF
20
20
20
30
35
ns
Output Hold from Address, CS# or OE#
Change, whichever is First
t
AXQX
t
OH
0
0
0
0
0
ns
1. Guaranteed by design, but not tested
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
FIGURE 5 AC WAVEFORMS FOR READ OPERATIONS
CS#
OE#
WE#
7
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
NOTES:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device (for each chip).
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
FIGURE 6 WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED
CS#
Data# Polling
D
7
#
OE#
WE#
8
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
FIGURE 7 AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS
NOTE:
1. SA is the sector address for Sector Erase.
Addresses
CS#
OE#
WE#
Data
V
CC
5555H
2AAAH
2AAAH
SA
5555H
5555H
t
WP
t
CS
t
VCS
10H/30H
55H
80H
55H
AAH
AAH
t
AH
t
AS
t
GHWL
t
WPH
t
DH
t
DS
9
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
FIGURE 8 AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED
ALGORITHM OPERATIONS
CS#
OE#
WE#
t
OE
t
CE
t
CH
t
OH
D7#
D7 =
Valid Data
High Z
D0-D6 = Invalid
D0-D7
Valid Data
t
DF
D7
D0-D6
t
OEH
t
WHWH 1 or 2
t
OE
Data
10
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
FIGURE 9 ALTERNATE CS# CONTROLLED PROGRAMMING OPERATION TIMINGS
Notes:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device (for each chip).
4. DOUT is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
CS#
Data# Polling
D
7
#
OE#
WE#
11
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
4.60 (0.181)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
12
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
o
o
0.940" TYP
The White 68 lead G2U CQFP fi lls the same fi t
and function as the JEDEC 68 lead CQFJ or
68 PLCC. But the G2U has the TCE and lead
inspection advantage of the CQFP form.
13
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
PACKAGE 528: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2L)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
25.15 (0.990) 0.25 (0.010) MAX
22.36 (0.880) 0.25 (0.010) MAX
20.31 (0.800) REF
0.38 (0.015) 0.05 (0.002)
1.27 (0.050) TYP
5.10 (0.200) MAX
0.25 (0.010) 0.10 (0.002)
24.0 (0.946)
0.25 (0.010)
0.23 (0.009) REF
R 0.127
(0.005)
2
O
/ 9
O
0.89 (0.035)
1.14 (0.045)
1.37 (0.054) MIN 0.004
0.940" TYP
14
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
0.38 (0.015)
0.08 (0.003)
68 PLACES
1.27 (0.050)
TYP
5.1 (0.200) MAX
39.6 (1.56) 0.38 (0.015) SQ
38 (1.50) TYP
4 PLACES
5.1 (0.200)
0.25 (0.010)
4 PLACES
12.7 (0.500)
0.5 (0.020)
4 PLACES
0.25 (0.010)
0.05 (0.002)
1.27 (0.050)
0.1 (0.005)
PIN 1 IDENTIFIER
Pin 1
Note 1: Package Not Recommended for New Design
PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)
1
15
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
ORDERING INFORMATION
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
V
PP
PROGRAMMING VOLTAGE
5
=
5
V
DEVICE
GRADE:
Q = MIL-STD-883 Compliant
M
=
Military
Screened
-55C
to
+125C
I
=
Industrial
-40C
to
+85C
C
=
Commercial
0C
to
+70C
PACKAGE TYPE:
H1 = 1.075" sq. Ceramic Hex In Line Package, HIP (Package 400*)
G2U = 22.4mm Ceramic Quad Flat Pack, Low Profi le CQFP (Package 510)
G2L = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 528)
G4T
1
= 40mm Low Profi le CQFP (Package 502)
ACCESS TIME (ns)
IMPROVEMENT
MARK
N = No Connect at pins 21 and 39 in HIP for Upgrade
ORGANIZATION, 512K x 32
User confi gurable as 1M x 16 or 2M x 8
FLASH
WHITE ELECTRONIC DESIGNS CORP.
W F 512K32 X - XXX X X 5 X
Note 1: Package Not Recommended for New Design
16
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF512K32-XXX5
March 2006
Rev. 11
DEVICE TYPE
SPEED
PACKAGE
SMD NO.
512K x 32 Flash Module
150ns
66 pin HIP (H1) 1.075" sq.
5962-94612 01H4X
512K x 32 Flash Module
120ns
66 pin HIP (H1) 1.075" sq.
5962-94612 02H4X
512K x 32 Flash Module
90ns
66 pin HIP (H1) 1.075" sq.
5962-94612 03H4X
512K x 32 Flash Module
70ns
66 pin HIP (H1) 1.075" sq.
5962-94612 04H4X
512K x 32 Flash Module
150ns
68 lead CQFP Low Profi le (G4T)
1
5962-94612 01HTX
1
512K x 32 Flash Module
120ns
68 lead CQFP Low Profi le (G4T)
1
5962-94612 02HTX
1
512K x 32 Flash Module
90ns
68 lead CQFP Low Profi le (G4T)
1
5962-94612 03HTX
1
512K x 32 Flash Module
70ns
68 lead CQFP Low Profi le (G4T)
1
5962-94612 04HTX
1
512K x 32 Flash Module
150ns
68 lead CQFP/J (G2U)
5962-94612 01HZX
512K x 32 Flash Module
120ns
68 lead CQFP/J (G2U)
5962-94612 02HZX
512K x 32 Flash Module
90ns
68 lead CQFP/J (G2U)
5962-94612 03HZX
512K x 32 Flash Module
70ns
68 lead CQFP/J (G2U)
5962-94612 04HZX
512K x 32 Flash Module
150ns
68 lead CQFP (G2L)
5962-94612 01HAX
512K x 32 Flash Module
120ns
68 lead CQFP (G2L)
5962-94612 02HAX
512K x 32 Flash Module
90ns
68 lead CQFP (G2L)
5962-94612 03HAX
512K x 32 Flash Module
70ns
68 lead CQFP (G2L)
5962-94612 04HAX
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