1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
HI-RELIABILITY PRODUCT
WMS512K8-XXX
512Kx8 MONOLITHIC SRAM, SMD 5962-95613
FEATURES
s Access Times 15, 17, 20, 25, 35, 45, 55ns
s MIL-STD-883 Compliant Devices Available
s Revolutionary, Center Power/Ground Pinout
JEDEC Approved
36 lead Ceramic SOJ (Package 100)
36 lead Ceramic Flat Pack (Package 226)
s Evolutionary, Corner Power/Ground Pinout
JEDEC Approved
32 pin Ceramic DIP (Package 300)
32 lead Ceramic SOJ (Package 101)
32 lead Ceramic Flat Pack (Package 220)
32 lead Ceramic Flat Pack (Package 142)
s 32 pin, Rectangular Ceramic Leadless Chip Carrier
(Package 601)
s Commercial, Industrial and Military Temperature Range
s 5 Volt Power Supply
s Low Power CMOS
s Low Power Data Retention for Battery Back-up Operation
s TTL Compatible Inputs and Outputs
REVOLUTIONARY PINOUT
EVOLUTIONARY PINOUT
32 DIP
32 CSOJ (DE)
32 FLAT PACK (FE)*
32 FLAT PACK (FD)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A0
A1
A2
A3
A4
CS
I/O0
I/O1
V
CC
GND
I/O2
I/O3
WE
A5
A6
A7
A8
A9
NC
A18
A17
A16
A15
OE
I/O7
I/O6
GND
V
CC
I/O5
I/O4
A14
A13
A12
A11
A10
NC
A
0-18
Address Inputs
I/O
0-7
Data Input/Output
CS
Chip Select
OE
Output Enable
WE
Write Enable
V
CC
+5.0V Power
GND
Ground
PIN DESCRIPTION
36 FLAT PACK
36 CSOJ
TOP VIEW
October 2000 Rev. 4
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
4
3
2
1 32 31 30
14 15 16 17 18 19 20
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O1
I/O2
V
SS
I/O3
I/O4
I/O5
I/O6
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
A12
A14
A16
A18
V
CC
A15
A17
TOP VIEW
32 CLCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
V
CC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
*Package not recommended for new designs, "FD" recommended for new designs.
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WMS512K8-XXX
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Min
Max
Unit
Operating Temperature
T
A
-55
+125
C
Storage Temperature
T
STG
-65
+150
C
Signal Voltage Relative to GND
V
G
-0.5
Vcc+0.5
V
Junction Temperature
T
J
150
C
Supply Voltage
V
CC
-0.5
7.0
V
CS
OE
WE
Mode
Data I/O
Power
H
X
X
Standby
High Z
Standby
L
L
H
Read
Data Out
Active
L
X
L
Write
Data In
Active
L
H
H
Out Disable
High Z
Active
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Supply Voltage
V
CC
4.5
5.5
V
Input High Voltage
V
IH
2.2
V
CC
+ 0.3
V
Input Low Voltage
V
IL
-0.3
+0.8
V
Operating Temp. (Mil.)
T
A
-55
+125
C
DC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55
C to +125
C)
Parameter
Sym
Conditions
Units
Min
Max
Input Leakage Current
I
LI
V
CC
= 5.5, V
IN
= GND to V
CC
10
A
Output Leakage Current
I
LO
CS = V
IH
, OE = V
IH
, V
OUT
= GND to V
CC
10
A
Operating Supply Current*
I
CC
CS = V
IL
, OE = V
IH
, f = 5MHz, Vcc = 5.5
160
mA
Standby Current
I
SB
CS = V
IH
, OE = V
IH
, f = 5MHz, Vcc = 5.5
15
mA
Output Low Voltage
V
OL
I
OL
= 8mA for 17 - 35ns,
0.4
V
I
OL
= 2.1mA for 45 - 55ns, V
CC
= 4.5
Output High Voltage
V
OH
I
OH
= -4.0mA for 17 - 35ns,
2.4
V
I
OH
= -1.0mA for 45 - 55ns, V
CC
= 4.5
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
* Not 100% duty cycle
CAPACITANCE
(T
A
= +25
C)
Parameter
Symbol
Condition
Package
Speed (ns)
Max
Unit
Input capacitance
C
IN
V
IN
= 0V, f = 1.0MHz
32 Pin CSOJ, DIP,
15 to 55
20
pF
Flat Pack Evolutionary
32 Pin CLCC
15 to 55
15
pF
15 to 35
12
pF
45 to 55
20
pF
Output capicitance
C
OUT
V
OUT
= 0V, f = 1.0MHz
32 Pin CSOJ, DIP,
15 to 55
20
pF
Flat Pack Evolutionary
15 to 35
12
pF
45 to 55
20
pF
This parameter is guaranteed by design but not tested.
36 Pin CSOJ & Flat Pack
Revolutionary
Parameter
Symbol
Conditions
Units
Min
Max
Data Retention Supply Voltage
V
DR
CS
V
CC
-0.2V
2.0
5.5
V
Low Power Data Retention
I
CCDR1
V
CC
= 3V
7
mA
Low Power Data Retention
I
CCDR2
V
CC
= 2V
2
mA
DATA RETENTION CHARACTERISTICS FOR LOW POWER "L" VERSION
36 Pin CSOJ & Flat Pack
Revolutionary
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WMS512K8-XXX
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55
C to +125
C)
Parameter
Symbol
-15
-17
-20
-25
-35
-45
-55
Units
Read Cycle
Min
Max
Min
Max
Min Max
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
RC
15
17
20
25
35
45
55
ns
Address Access Time
t
AA
15
17
20
25
35
45
55
ns
Output Hold from Address Change
t
OH
0
0
0
0
0
0
0
ns
Chip Select Access Time
t
ACS
15
17
20
25
35
45
55
ns
Output Enable to Output Valid
t
OE
8
9
10
12
25
25
25
ns
Chip Select to Output in Low Z
t
CLZ
1
2
2
2
2
4
4
4
ns
Output Enable to Output in Low Z
t
OLZ
1
0
0
0
0
0
0
0
ns
Chip Disable to Output in High Z
t
CHZ
1
8
9
10
12
15
20
20
ns
Output Disable to Output in High Z
t
OHZ
1
8
9
10
12
15
20
20
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55
C to +125
C)
Parameter
Symbol
-15
-17
-20
-25
-35
-45
-55
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
WC
15
17
20
25
35
45
55
ns
Chip Select to End of Write
t
CW
13
14
14
15
25
35
50
ns
Address Valid to End of Write
t
AW
13
14
14
15
25
35
50
ns
Data Valid to End of Write
t
DW
8
9
10
10
20
25
25
ns
Write Pulse Width
t
WP
13
14
14
15
25
35
40
ns
Address Setup Time
t
AS
2
2
2
2
2
2
2
ns
Address Hold Time
t
AH
0
0
0
0
0
5
5
ns
Output Active from End of Write
t
OW
1
2
2
3
4
4
5
5
ns
Write Enable to Output in High Z
t
WHZ
1
8
9
9
10
15
20
25
ns
Data Hold Time
t
DH
0
0
0
0
0
0
0
ns
1. This parameter is guaranteed by design but not tested.
I
Current Source
D.U.T.
C = 50 pf
eff
I
OL
V
1.5V
(Bipolar Supply)
Z
Current Source
OH
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75
.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
V
IL
= 0, V
IH
= 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WMS512K8-XXX
WS32K32-XHX
TIMING WAVEFORM - READ CYCLE
WRITE CYCLE - CS CONTROLLED
WRITE CYCLE - WE CONTROLLED
ADDRESS
DATA I/O
WRITE CYCLE 1, WE CONTROLLED
t
AW
t
CW
t
AH
t
WP
t
DW
t
WHZ
t
AS
t
OW
t
DH
t
WC
DATA VALID
CS
WE
ADDRESS
DATA I/O
WRITE CYCLE 1 WE CONTROLLED (OE = V
IH
)
t
AW
t
CW
t
AH
t
WP
t
DW
t
WHZ(1)
t
AS
t
OW
t
DH
t
WC
DATA VALID
(1) GUARANTEED BY DESIGN BUT NOT TESTED
CS
WE
ADDRESS
DATA I/O
READ CYCLE 2 (WE = V
IH
)
t
AA
t
ACS
t
OE
t
CLZ
t
OLZ
t
OHZ
t
RC
DATA VALID
HIGH IMPEDANCE
CS
OE
t
CHZ
ADDRESS
DATA I/O
READ CYCLE 1 (CS = OE = V
IL
, WE = V
IH
)
t
AA
t
OH
t
RC
DATA VALID
PREVIOUS DATA VALID
5
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WMS512K8-XXX
PACKAGE 100:
36 LEAD, CERAMIC SOJ
1.27 (0.050) TYP
23.37 (0.920)
0.25 (0.010)
PIN 1 IDENTIFIER
21.6 (0.850) TYP
11.23 (0.442)
0.30 (0.012)
4.7 (0.184) MAX
0.89 (0.035)
Radius TYP
0.2 (0.008)
0.05 (0.002)
9.55 (0.376)
0.25 (0.010)
1.27 (0.050)
0.25 (0.010)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 101:
32 LEAD, CERAMIC SOJ
1.27 (0.050) TYP
21.1 (0.830)
0.25 (0.010)
PIN 1 IDENTIFIER
19.1 (0.750) TYP
11.23 (0.442)
0.30 (0.012)
3.96 (0.156) MAX
0.2 (0.008)
0.05 (0.002)
9.55 (0.376)
0.25 (0.010)
1.27 (0.050)
0.25 (0.010)
0.89 (0.035)
Radius TYP
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