4
SRAM
MODULES
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WS128K32-XXX
128Kx32 SRAM MODULE, SMD 5962-93187
n Commercial, Industrial and Military Temperature
Ranges
n 5 Volt Power Supply
n Low Power CMOS
n TTL Compatible Inputs and Outputs
n Built in Decoupling Caps and Multiple Ground
Pins for Low Noise Operation
n Weight
WS128K32-XG1U - 5 grams typical
WS128K32-XG2UX - 8 grams typical
WS128K32-XH1X - 13 grams typical
WS128K32-XG4TX - 20 grams typical
n All devices are upgradeable to 512Kx32
FEATURES
n Access Times of 70, 85, 100, 120ns
n MIL-STD-883 Compliant Devices Available
n Packaging
66-pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400).
68 lead, 40mm Low Profile CQFP, 3.56mm
(0.140")(Package 502).
68 lead, Hermetic CQFP (G2U), 22.4mm
(0.880 inch) square, 4.57mm (0.140 inch)
high, (Package 510)
68 lead, Hermetic CQFP (G1U), 23.9mm
(0.940 inch) square, 4.57mm (0.140inch) high,
(Package 519)
n Organized as 128Kx32; User Configurable as
256Kx16 or 512Kx8
PIN DESCRIPTION
I/O
0-31
Data Inputs/Outputs
A
0-16
Address Inputs
WE
1-4
Write Enables
CS
1-4
Chip Selects
OE
Output Enable
V
CC
Power Supply
GND Ground
NC
Not Connected
BLOCK DIAGRAM
TOP VIEW
FIG. 1
PIN CONFIGURATION FOR WS128K32N-XH1X
September 2001 Rev. 3
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
NC
I/O
0
I/O
1
I/O
2
WE
2
CS
2
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
NC
A
13
A
8
I/O
16
I/O
17
I/O
18
V
CC
CS
4
WE
4
I/O
27
A
4
A
5
A
6
WE
3
CS
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
4
SRAM
MODULES
2
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WS128K32-XXX
FIG. 2
PIN CONFIGURATION FOR WS128K32-XG4TX
FIG. 3
PIN CONFIGURATION FOR WS128K32-XG1UX
AND WS128K32-XG2UX
TOP VIEW
PIN DESCRIPTION
BLOCK DIAGRAM
TOP VIEW
PIN DESCRIPTION
I/O
0-31
Data Inputs/Outputs
A
0-16
Address Inputs
WE Write Enable
CS
1-4
Chip Selects
OE Output Enable
V
CC
Power Supply
GND Ground
NC
Not Connected
BLOCK DIAGRAM
I/O
0-31
Data Inputs/Outputs
A
0-16
Address Inputs
WE
1-4
Write Enable
CS
1-4
Chip Selects
OE Output Enable
V
CC
Power Supply
GND Ground
NC
Not Connected
128K x 8
8
I / O
0 - 7
CS
1
128K x 8
8
I / O
8 - 1 5
CS
2
128K x 8
8
I / O
1 6 - 2 3
CS
3
128K x 8
8
I / O
2 4 - 3 1
CS
4
A
0
-
1 6
O E
W E
4
SRAM
MODULES
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WS128K32-XXX
Parameter Symbol Conditions -70 -85 -100 -120 Units
Min
Max
Min
Max
Min
Max
Min
Max
Data Retention
Supply Voltage
V
DR
CSV
CC
-0.2V
2.0
5.5
2.0
5.5
2.0
5.5
2.0
5.5
V
Data Retention
Current
I
CCDR1
V
CC
= 3V
4
4
4
4
mA
CAPACITANCE
(T
A
= +25C)
Parameter
Symbol
Conditions
Max Unit
OE capacitance
C
OE
V
IN
= 0 V, f = 1.0 MHz 50
pF
WE
1-4
capacitance
C
WE
V
IN
= 0 V, f = 1.0 MHz
pF
HIP (PGA)
20
CQFP G4T
50
CQFP G1U
20
CQFP G2U
15
CS
1-4
capacitance
C
CS
V
IN
= 0 V, f = 1.0 MHz
20
pF
Data I/O capacitance
C
I/O
V
I/O
= 0 V, f = 1.0 MHz
20
pF
Address input capacitance
C
AD
V
IN
= 0 V, f = 1.0 MHz
50
pF
This parameter is guaranteed by design but not tested.
Parameter
Sym
Conditions
-70
-85
-100
-120
Units
Min
Max
Min
Max
Min
Max
Min
Max
Input Leakage Current
ILI
VCC = 5.5, VIN = GND to VCC
10
10
10
10
A
Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC
10
10
10
10
A
Operating Supply Current I C C CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5
120
120
120
120
mA
Standby Current
ISB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5
2
0
2
0
2
0
2
0
mA
Output Low Voltage
VOL IOL = 2.1mA, Vcc = 4.5
0.4
0.4
0.4
0.4
V
Output High Voltage
VOH IOH = -1.0mA, Vcc = 4.5
2.4
2.4
2.4
2.4
V
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
ABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Operating Temperature
T
A
-55
+125
C
Storage Temperature
T
STG
-65
+150
C
Signal Voltage Relative to GND
V
G
-0.5
Vcc+0.5
V
Junction Temperature
T
J
150
C
Supply Voltage
V
CC
-0.5
7.0
V
Parameter
Symbol
Min
Max
Unit
Supply Voltage
V
CC
4.5
5.5
V
Input High Voltage
V
IH
2.2
V
CC
+ 0.3
V
Input Low Voltage
V
IL
-0.5
+0.8
V
DC CHARACTERISTICS
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55C to +125C)
DATA RETENTION CHARACTERISTICS
(T
A
= -55C to +125C)
CS
OE
WE
Mode
Data I/O
Power
H
X
X
Standby
High Z
Standby
L
L
H
Read
Data Out
Active
L
H
H
Out Disable
High Z
Active
L
X
L
Write
Data In
Active
4
SRAM
MODULES
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WS128K32-XXX
FIG. 4
AC TEST CIRCUIT
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75W.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC TEST CONDITIONS
Parameter
Typ Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
Parameter
Symbol
-70
-85
-100
-120
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
RC
70
85
100
120
ns
Address Access Time
t
A A
70
85
100
120
ns
Output Hold from Address Change
t
OH
3
3
3
3
ns
Chip Select Access Time
t
A C S
70
85
100
120
ns
Output Enable to Output Valid
t
OE
35
45
50
60
ns
Chip Select to Output in Low Z
t
CLZ
1
3
3
3
3
ns
Output Enable to Output in Low Z
t
OLZ
1
0
0
0
0
ns
Chip Disable to Output in High Z
t
CHZ
1
25
25
35
35
ns
Output Disable to Output in High Z
t
OHZ
1
25
25
35
35
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, T
A
= -55C To +125C)
AC CHARACTERISTICS
(V
CC
= 5.0V, T
A
= -55C To +125C)
Parameter
Symbol
-70
-85
-100
-120
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
WC
70
85
100
120
ns
Chip Select to End of Write
t
CW
60
75
80
100
ns
Address Valid to End of Write
t
AW
60
75
80
100
ns
Data Valid to End of Write
t
DW
30
35
40
50
ns
Write Pulse Width
t
WP
50
55
70
80
ns
Address Setup Time
t
A S
5
5
5
5
ns
Address Hold Time
t
A H
5
5
5
5
ns
Output Active from End of Write
t
OW
1
5
5
5
5
ns
Write Enable to Output in High Z
t
WHZ
1
25
25
35
35
ns
Data Hold Time
t
DH
0
0
0
0
ns
1. This parameter is guaranteed by design but not tested.
I
Current Source
D.U.T.
C = 50 pf
eff
I
OL
V
1.5V
(Bipolar Supply)
Z
Current Source
OH
4
SRAM
MODULES
5
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WS128K32-XXX
WS32K32-XHX
FIG. 5
TIMING WAVEFORM - READ CYCLE
FIG. 7
WRITE CYCLE - CS CONTROLLED
FIG. 6
WRITE CYCLE - WE CONTROLLED
ADDRESS
DATA I/O
WRITE CYCLE 2, CS CONTROLLED
t
AW
t
AS
t
CW
t
AH
t
WP
t
DH
t
DW
t
WC
CS
WE
DATA VALID
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