1
Preliminary
Winbond ES521
Evaluation System
User Guide
2
Preliminary
INTRODUCTION: ........................................................................................................... 3
CONTENT OF THE ES521 EVALUATION KIT: ....................................................... 3
APPLICATION SOFTWARE AT A GLANCE: ........................................................... 4
INTRODUCTION TO SYSTEM SETUP ...................................................................... 5
CONFIGURATION REGISTERS.................................................................................. 7
STORING CUSTOM CONFIGURATIONS ................................................................. 8
ANALOG PLAY AND RECORD ................................................................................... 8
THE STATUS REGISTER .............................................................................................. 8
DIGITAL READ AND WRITE ...................................................................................... 9
R
EADING AND
W
RITING
S
TRINGS
.................................................................................... 9
R
EADING
R
AW
D
ATA
....................................................................................................... 9
ON BOARD CLOCK GENERATION ......................................................................... 11
RUNNING ONE OR TWO DEVICES ......................................................................... 11
SETTING UP THE BOARD.......................................................................................... 12
C
LOCK
C
ONFIGURATION
J
UMPER
(J9)............................................................................ 12
CODEC J
UMPER
(J1)..................................................................................................... 12
I
2
C S
WITCHES
(SDA, SCL) ........................................................................................... 12
CODEC S
WITCHES
(SCK, WS, MCLK, SDI, SDIO) ................................................... 12
R
ECOMMENDED POWER SUPPLY
..................................................................................... 12
ES521 SCHEMATICS .................................................................................................... 13
C
ONNECTORS AND CLOCK GENERATION
......................................................................... 13
M
AIN
5216..................................................................................................................... 14
S
ECOND
5216................................................................................................................. 15
3
Preliminary
Introduction:
The ES521 evaluation system allows testing of all features of the chip and visually shows the
signal flow through the chip.
Writing to three 16-bit configuration registers sets up the signal flow. An active path is highlighted
in blue while the gray arrows show possible but not currently active paths.
The main application window allows playback and record of analog audio as well as setting up
the configuration registers.
There are three ways to set the configuration registers,
Change the controls on the main window until the desired signal flow is highlighted in
blue.
Type in values in the configuration register boxes in the top left window, the signal flow
will be updated to show the current signal path.
Select a path from the Path menu.
The various play and record buttons allow playback and record either from a supplied address or
the current location of the address pointer. Pressing the `Read Status' button retrieves the
address pointer.
The program also supports reading and writing digital data by selecting the `Digital' menu in the
menu bar.
Content of the ES521 evaluation kit:
The evaluation system package contains an Evaluation Board (batteries included) and a CD
ROM with the following items:
User's Guide
Self installing application software
Data sheets
4
Preliminary
Application software at a glance:
Figure 1 Software Overview
Type in configuration
Current configuration register
binary representation of
settings in these boxes
settings in hex numbers
configuration registers
select main or
secondary
device
CODEC setup
Status display
current address
PCM / I
2
S
pointer
clock / sync
5
Preliminary
Introduction to system setup
To quickly get familiar with the system, follow this tutorial that will explain the procedure of setting
up a feed through path from the microphone to the speaker of the main 5216. The main 5216
uses the analog audio connectors on the left side of the board.
Start the ES521 Application from the start menu. The default path is all configuration
registers set to 0.
Set the Aux Gain control to `OFF'
Set the SUM1AMP control to `OFF'
Set the SUM1MUX to `OFF'
Set the SUM2 control to `OFF'
Set the CODEC MUX to `NONE'
Set the CODEC A/D control to `OFF', this prevents noise from the CODEC.
Set the CODEC D/A control to `OFF', also for preventing noise.
Set the Volume MUX control to `INP MUX'
Set the Output Select control to `8 Ohm'
Click `Write Config', this updates the main 5216 with this setup.
The display should now show a single blue path from the microphone to the output. If a speaker
is connected to the speaker output, any sound coming into the microphone will be played back
over the speaker.
The top left corner of the application windows shows the configuration registers, they should look
like in the following picture.
Figure 2 Configuration Register settings
If other values are displayed, restart the application and follow the steps again.
The binary representation of the Configuration Registers at the top of the application window
shows the register content in binary form with bit names used in the data sheet.
There are two other ways to get to the same setup:
Exit and restart the application to get back to the initial state. Go into the Paths menu and
select `MIC to Speaker'. This should display an identical setup, press the `Write Config'
button to write the data to the chip.
6
Preliminary
Type the following values in the three text boxes in the top left corner:
0464
C7E0
0003
Press the `Load' button, This will also set up the same configuration. Press the `Write
Config' button to write the data to the chip.
7
Preliminary
Configuration Registers
The ISD5216 is a very versatile chip where the analog audio signal can be routed and processed
in a variety of ways. Writing to three configuration registers sets up the internal path.
To aid the setup of the signal paths, the available paths are displayed graphically and the
currently selected path highlighted in blue while the available but inactive paths are shown in
gray.
An arrow is only highlighted if there is a signal at the input end, and the signal can be accepted at
the other end. The easiest way to setup a path is from the signal input towards the output.
There are a number of ways to set up the path of analog audio, Note: The configuration
registers are not actually written to the chip until the `Write Config' button is pressed:
1. The controls on the main application window can be used to setup any path through the
system. Set all controls so that the desired path is highlighted and click `Write Config' to
write the configuration to the chip. An arrow is only highlighted if there is a connection at
both ends of the arrow. To setup a configuration, start from the input and move towards
the outputs. For example, the paths to the CODEC will not be highlighted unless the A/D
converter is switched on.
2. A value can be typed directly into the configuration register boxes. Pressing the load
button will update the graphics on the main display. The configuration register setup
should be written in hex numbers.
3. The `Paths' menu contains stored paths that will setup a given configuration. It is possible
to add and remove paths from this menu to save commonly used paths.
The currently selected configuration is displayed in three ways:
Graphically by highlighted arrows.
A hexadecimal number labeled `CFG0', `CFG1 and `CFG2'
A binary number with the bit labels used in the datasheet
The buttons used for configuration register setup is:
Load - Update the current configuration with the settings in the textboxes in the top left
corner
Write Config Write the settings currently selected to the chip.
Chip Select Choose whether to use the main or secondary board
8
Preliminary
Storing Custom Configurations
The application comes pre-configured with a few useful paths that can be found in the Paths
menu.
To add new paths, simply set up the desired configuration and select `Add Path' from the Paths
menu, a window will appear asking for a name for this configuration. Fill in a descriptive name
(max 32 characters) and click OK to store this path. The paths are permanently stored on the
computer. A maximum of 32 paths can be stored.
To remove a stored path, select the path from the Path menu and click `Remove Path' in the Path
menu. The Path will be permanently removed.
Analog Play and Record
The ES521 Demo System allows full playback and record capabilities from the main application
window. The 5216 supports two types of addressing:
Use current address Recording or Playback starts from the position of the current address
pointer, no address is sent as part of the command. The address pointer can be retrieved from by
pressing the `Read Status' button which displays the address bytes as two hexadecimal numbers
(high and low address byte)
Supply address Record and Playback can be setup by sending an address with the Play or
Record command. See the 5216 datasheet for addressing details.
Play Play from the current address
Play from address Play from the address given in the box below the button.
Record Record from the current address.
Record from address Record from the address given in the box below the button.
The Status Register
The Status register gives an indication of what the chip is currently doing, and the current address
pointer.
Select which chip to use (main or secondary 5216) and click the `Read Status' button near the
bottom of the screen to update the status. It gives the following information:
Table 1 Status Register bits
EOM
Indicates that an End Of Message interrupt has occurred
OVF
Indicates that Recording or Playback reached the end of the array
RDY
When set, the chip is ready to accept new commands.
PD
Set when the chip is powered down
PRB
Set when chip is in playback mode, cleared when in record mode
Address
The current address pointer to the memory array
9
Preliminary
Digital Read and Write
The ISD5216 chip allows writing of digital data as well as analog. Any address can be used for
either analog or digital storage, but not both at the same time.
The demo application shows the capability to read and write text into memory and also read the
raw data out of any memory cell.
The Address box at the top of the window is shared for all operations, type in a hex number
between 0 and FFFF to specify a 64 bit block. If no address is specified, the application is going
to use the current address pointer. For details about addressing, please refer to the datasheet.
Reading and Writing Strings
Erase: Pressing this button will erase one page of data (2048 bits), it is not possible to erase a
smaller number of bits.
Read Data: Reads a string of characters previously stored with the Write Data button.
Write Data: Writes a string to non-volatile digital memory (max 256 characters)
Reading Raw Data
The program allows reading of the raw data from any position in the array. Use the address box
at the top of the window or leave it blank for using the current address.
Type the number of 64 bit words to read (a decimal number) and press Read Raw Data to
retrieve the data.
10
Preliminary
Figure 3 Digital Read and Write Dialog
Address used for
All operations
Raw data in hexadecimal notation
11
Preliminary
On Board Clock Generation
The ES521 Evaluation System has a pair of jumper selectable oscillators. Please refer to the
datasheet for details of operating modes.
There are three clocks supplied to the 5216s:
MCLK The main clock straight from the oscillator.
SCK Bit clock used for I
2
S or PCM data.
WS Word sync / Frame sync used by I
2
S or PCM data.
PCM mode uses the 13.824MHz oscillator to generate an 8kHz signal commonly used in telecom
applications. The clock jumper(J9) must be set to the 13.824MHz setting and CODEC jumper (J1)
must be set to PCM. The clock generator allows short and long frame sync to be selected.
Note: The frame sync setting is not part of the configuration registers and therefore applies to
both devices. It is not stored in the paths setup.
I
2
S mode uses a 20.48MHz oscillator to generate the I
2
S bit clock and there is only one word sync
length setting. The CODEC jumper(J9) must be in the I
2
S position
Running One Or Two Devices
The Demo Board is set up to allow running either one of the two devices from the PC parallel
port, and the central bank of DIP switches allows decoupling of the I
2
C and CODEC buses so that
the devices can be controlled independently.
The headers bring out the full I
2
C and CODEC buses as well as the RAC and INT pin of each
device. In the normal mode with the DIP switches on, the devices are connected together
allowing the CODECs of both devices to communicate with each other, and the PC to control the
I
2
C bus of both devices. Disabling the CODEC DIP switches allows for example another CODEC
chip to be connected.
If the external CODEC is connected to the main 5216, the external CODEC will be in slave mode,
if connected to the secondary 5216, the clocks from the clock generator on the Demo Board can
be disconnected and the secondary 5216 run in slave mode.
12
Preliminary
Setting up the board
The board has the following connectors and possible setups:
Clock Configuration Jumper (J9)
The clock jumper is only needed for operations involving the CODEC, the jumper allows selection
between the 13.824MHz and the 20.48MHz oscillator on the board. 13.824MHz is used for 8kHz
applications such as A-law or
-law CODEC operation. 20.48MHz is divided down to 44.1kHz to
interface using I
2
S.
Using long or short frame sync in PCM mode is software selectable from the main application
window.
CODEC Jumper (J1)
In I
2
S mode, the two SDIO lines are connected together, while in PCM mode the SDIO is
connected to SDI and vice versa.
I
2
C Switches (SDA, SCL)
When the DIP switches for SDA and SCL are on, both 5216s are controlled using the I
2
C bus
from the PC parallel port. Switching the I
2
C interface off allows control of the second 5216 from
the J10 header. Note that pull-ups must be provided by the external bus driver in that case.
CODEC Switches (SCK, WS, MCLK, SDI, SDIO)
The 5216 CODECs can be connected together or run separately depending on the switch setup.
The switches allow the clocks generated on the main board to be connected to the secondary
board as well, and the CODEC data lines allow digital communication between the devices.
The clocks are always connected to the main board, but switching the CODEC off allows the
secondary board to be controlled by another device using the J10 header.
Recommended power supply
The board can be driven by a 9V battery or a 5 to 9V DC supply with positive polarity rated at 500
mA
13
Preliminary
ES521 Schematics
Connectors and clock generation
C17
1uf
RB2
TP4
DGND
1
U3B
SN74LV125AD
5
6
14
4
7
2
1
D1
LED
J7
PJ_202A_POWER_JACK
1
2
3
1
2
3
R16
3.6K
VCCD
RB2
Single point
connection
close to J1
P1
CONNECTOR DB25
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
C22
0.01uf
VCCD
U6
B500CT3E 13.824
MHZ
1
5
4
8
1 NC
OUT
VSS
VCC
VCCD
WS_1
TP5
AGND
1
C14
100uf @ 20V
U3C
SN74LV125AD
9
8
14
10
7
RAC_1
C19
0.1uf
SDA_1
R7
1K
C16
0.1uf
RB1
C18
0.01uf
+
U7
PIC16F84A-20P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
RA2
RA3
RA4
MCLR
VSS
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
VDD
OSC2
OSC1
RA0
RA1
SW2
SPDT SWITCH
1
2
3
1
2
3
-
+
SCK_1
C21
0.1uf
R8
1K
U4
NJU7201L30
1
2
3
VSS (GND)
IN
3V OUT
U3D
SN74LV125AD
12
11
14
13
7
RB3
C15
1uf
C13
0.1uf
+
VCCD
U3A
SN74LV125AD
2
3
14
1
7
J8
HEADER 2
1
2
RB0
C12
0.1uf
USE FREE
TRACK
TO SHORT(.156)
TP8
DGND
1
MCLK_1
TP6
DGND
1
VCCD
+
C20
0.01uf
C23
0.1uf
+9VDC
SCL_1
TP3
AGND
1
RB0
TP2
DGND
1
VCCD
RB3
U5
B500CT3E 20.480
MHZ
1
5
4
8
1 NC
OUT
VSS
VCC
J6
9V BATT HOLDER
1
2
9V
Cell
R9
470
VCCA
VCCD
RAC_2
TP7
AGND
1
DC POWER JACK w SW
J9
HEADER 3
1
2
3
MCLK_1
TP1
AGND
1
RB1
U2
NJU7201L30
1
2
3
VSS (GND)
IN
3V OUT
14
Preliminary
Main 5216
RAC_1
VCCA
SDI_1
SCK_1
SW1
SW DIP-7
+
SDIO_1
R3
1K
J2
HEADER 10
1
2
3
4
5
6
7
8
9
10
SCL_1
ACAP_AGND
SDI_2
R2
10K
C6
0.01uf
C7
0.1uf
SCL_1
J5
MJ_3536
2
3
1
SDA_2
MCLK_1
J4
MJ_3536
2
3
1
C8
0.1uf
VCCD
R6
1.5K
R4
1K
J1
HEADER 3
1
2
3
SCL_1
MCLK_1
C3
47uf
MCLK_1
WS_1
DUT 1
VCCD
SDIO_2
C4
47uf
C5
0.1uf
J3
MJ_3536
2
3
1
SDA_1
MCLK_2
C2
0.1uf
C1
0.01uf
SDA_1
X1
MICROPHONE
1
2
U1
ISD5216
5
4
2
3
25
26
27
17
18
9
10
23
15
13
24
21
12
28 1
16
7 6
8 14 22
19
11
20
A0
SDA
SCL
A1
RAC
INT
MCLK
AUXIN
AUXOUT
MIC+
MIC-
SDI
SP+
SP-
SDIO
WS
ACAP
VCCD VCCD
VCCA
VSSD VSSD
VSSA VSSA VSSA
N/C
MICBS
SCK
SDIO_2
WS_1
WS_1
INT_1
R5
1.5K
WS_2
SDI_1
VCCD
SDI_1
+
SDA_1
INT_1
SDIO_1
SCK_2
SDIO_1
C10
0.1uf
SCK_1
RAC_1
SCL_2
SCK_1
R1
10K
C9
0.1uf
SDIO_1
C11
4.7uf
15
Preliminary
Second 5216
SCL_2
WS_2
+
RAC_2
C32
0.1uf
VCCD
VCCD
R12
1K
RAC_2
R11
10K
R13
1K
MCLK_2
C29
0.01uf
SDI_2
C26
47uf
R10
10K
SDI_2
C24
0.01uf
VCCD
SDIO_2
MCLK_2
C27
47uf
SDA_2
R14
1.5K
SCL_2
SDA_2
INT_2
X2
MICROPHONE
1
2
J10
HEADER 10
1
2
3
4
5
6
7
8
9
10
SCK_2
J13
MJ_3536
2
3
1
J11
MJ_3536
2
3
1
+
J12
MJ_3536
2
3
1
U8
ISD5216
5
4
2
3
25
26
27
17
18
9
10
23
15
13
24
21
12
28 1
16
7
6
8 14
22
19
11
20
A0
SDA
SCL
A1
RAC
INT
MCLK
AUXIN
AUXOUT
MIC+
MIC-
SDI
SP+
SP-
SDIO
WS
ACAP
VCCD
VCCD
VCCA
VSSD VSSD
VSSA VSSA VSSA
N/C
MICBS
SCK
SCK_2
R15
1.5K
C33
0.1uf
+
VCCD
VCCA
INT_2
SDIO_2
C34
4.7uF
C30
0.1uf
DUT 2
C25
0.1uf
C31
0.1uf
WS_2
ACAP_AGND
C28
0.1uf
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