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W2465
8K
8 CMOS STATIC RAM
Publication Release Date: April 1997
- 1 -
Revision A8
GENERAL DESCRIPTION
The W2465 is a slow-speed, low-power CMOS static RAM organized as 8192
8 bits that operates
on a single 5-volt power supply. This device is manufactured using Winbond's high performance
CMOS technology.
FEATURES
Low power consumption:
-
Active: 250 mW (max.)
-
Standby: 100
W (max.)(LL-version)
250
W (max.)(L-version)
Access time: 70/100 nS (max.)
Single +5V power supply
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 2V (min.)
Available packages: 28-pin 600 mil DIP,
330 mil SOP and 300 mil skinny DIP
PIN CONFIGURATION
A8
A9
1
2
3
4
5
25
26
27
28
NC
A7
A6
A5
A12
A4
A3
A2
A1
6
7
8
9
20
21
22
23
A11
A10
I/O8
I/O7
I/O6
I/O5
10
11
12
13
16
17
18
19
A0
I/O2
I/O3
I/O1
14
15
I/O4
CS
CS
OE
WE
V
DD
V
SS
24
BLOCK DIAGRAM
A0
.
CS1
A12
WE
I/O1
I/O8
OE
V
V
.
.
DATA I/O
ARRAY
DECODER
CORE
CS2
.
CONTROL
DD
SS
PIN DESCRIPTION
SYMBOL
DESCRIPTION
A0
-
A12
Address Inputs
I/O1
-
I/O8
Data Inputs/Outputs
CS1, CS2
Chip Select Inputs
WE
Write Enable Input
OE
Output Enable Input
V
DD
Power Supply
V
SS
Ground
NC
No Connection
W2465
- 2 -
TRUTH TABLE
CS1
CS2
OE
WE
MODE
I/O1
-
I/O8
V
DD
CURRENT
H
X
X
X
Not Selected
High Z
I
SB
, I
SB
1
X
L
X
X
Not Selected
High Z
I
SB
, I
SB
1
L
H
H
H
Output Disable
High Z
I
DD
L
H
L
H
Read
Data Out
I
DD
L
H
X
L
Write
Data In
I
DD
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER
RATING
UNIT
Supply Voltage to V
SS
Potential
-0.5 to +7.0
V
Input/Output to V
SS
Potential
-0.5 to V
DD
+0.5
V
Allowable Power Dissipation
1.0
W
Storage Temperature
-65 to +150
C
Operating Temperature
0 to +70
C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
Operating Characteristics
(V
DD
= 5V
10%, V
SS
= 0V, T
A
= 0 to 70
C)
PARAMETER
SYM.
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input Low Voltage
V
IL
-
-0.5
-
+0.8
V
Input High Voltage
V
IH
-
+2.2
-
V
DD
+0.5
V
Input Leakage Current
I
LI
V
IN
= V
SS
to V
DD
-2
-
+2
A
Output Leakage
Current
I
LO
V
I/O
= V
SS
to V
DD
CS1
= V
IH
(min.) or CS2
= V
IL
(max.) or
OE
= V
IH
(min.) or
WE
= V
IL
(max.)
-2
-
+2
A
Output Low Voltage
V
OL
I
OL
= +4.0 mA
-
-
0.4
V
Output High Voltage
V
OH
I
OH
= -1.0 mA
2.4
-
-
V
Operating Power
Supply Current
I
DD
CS1
= V
IL
(max.),
CS2 = V
IH
(min.)
70
-
-
70
mA
I/O = 0 mA,
Cycle = min.
Duty = 100%
100
-
-
60
mA
Standby Power Supply
Current
I
SB
CS1
= V
IH
(min.) or CS2
= V
IL
(max.), Cycle = min.
Duty = 100%
-
-
3
mA
I
SB
1
CS1
V
DD
-0.2V
LL
-
-
20
A
or CS2
0.2V
L
-
-
50
A
Note: Typical characteristics are at V
DD
= 5 V, T
A
= 25
C.
W2465
Publication Release Date: April 1997
- 3 -
Revision A8
CAPACITANCE
(V
DD
= 5V, T
A
= 25
C, f = 1 MHz)
PARAMETER
SYM.
CONDITIONS
MAX.
UNIT
Input Capacitance
C
IN
V
IN
= 0V
6
pF
Input/Output Capacitance
C
I/O
V
OUT
= 0V
8
pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER
CONDITIONS
Input Pulse Levels
0.6V to 2.4V
Input Rise and Fall Times
5 nS
Input and Output Timing Reference Level
1.5V
Output Load
C
L
= 100 pF, I
OH
/I
OL
= -1 mA/4 mA
AC Test Loads and Waveform
90%
90%
5 nS
10%
5 nS
10%
R1 1000 ohm
5V
OUTPUT
R2
660 ohm
100 pF
Including
Jig and
Scope
2.4V
0.6V
5V
OUTPUT
R1 1000 ohm
5 pF
Including
Jig and
Scope
R2
660 ohm
(For T
CLZ1, CLZ2, OLZ, CHZ1, CHZ2, OHZ, WHZ, OW
T
T
T
T
T
T
T
)
W2465
- 4 -
AC Characteristics, continued
(V
DD
= 5V
10%, V
SS
= 0V, T
A
= 0 to 70
C)
Read Cycle
PARAMETER
SYM.
W2465-70
W2465-10
UNIT
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
T
RC
70
-
100
-
nS
Address Access Time
T
AA
-
70
-
100
nS
Chip Select Access Time
CS1
T
ACS
1
-
70
-
100
nS
CS2
T
ACS
2
-
70
-
100
nS
Output Enable to Output Valid
T
AOE
-
35
-
50
nS
Chip Selection to Output in Low Z
CS1
T
CLZ1
*
5
-
10
-
nS
CS2
T
CLZ2
*
5
-
10
-
nS
Output Enable to Output in Low Z
T
OLZ
*
5
-
5
-
nS
Chip Deselection to Output in High Z
CS1
T
CHZ1
*
-
30
-
35
nS
CS2
T
CHZ2
*
-
30
-
35
nS
Output Disable to Output in High Z
T
OHZ
*
-
30
-
35
nS
Output Hold from Address Change
T
OH
10
-
10
-
nS
* These parameters are sampled but not 100% tested.
Write Cycle
PARAMETER
SYM.
W2465-70
W2465-10
UNIT
MIN.
MAX.
MIN.
MAX.
Write Cycle Time
T
WC
70
-
100
-
nS
Chip Selection to End of Write
CS1
T
CW1
60
-
80
-
nS
CS2
T
CW2
60
-
80
-
nS
Address Valid to End of Write
T
AW
60
-
80
-
nS
Address Setup Time
T
AS
0
-
0
-
nS
Write Pulse Width
T
WP
45
-
60
-
nS
Write Recovery Time
CS1
,
WE
T
WR1
0
-
0
-
nS
CS2
T
WR2
0
-
0
-
nS
Data Valid to End of Write
T
DW
30
-
40
-
nS
Data Hold from End of Write
T
DH
0
-
0
-
nS
Write to Output in High Z
T
WHZ
*
-
30
-
30
nS
Output Disable to Output in High Z
T
OHZ
*
-
30
-
30
nS
Output Active from End of Write
T
OW
0
-
0
-
nS
* These parameters are sampled but not 100% tested.
W2465
Publication Release Date: April 1997
- 5 -
Revision A8
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
Address
T
D
OUT
OH
T
AA
T
RC
T
OH
Read Cycle 2
(Chip Select Controlled)
CS1
CS2
D
OUT
T
ACS1
T
ACS2
T
CLZ1
T
CLZ2
T
CHZ1
T
CHZ2
Read Cycle 3
(Output Enable Controlled)
Address
OE
CS1
CS2
D
OUT
T
CLZ2
T
ACS2
T
CLZ1
T
OLZ
T
ACS1
T
AOE
T
AA
T
RC
T
OH
T
CHZ1
T
OHZ
T
CHZ2