W24L010A 128K X 8 High-Speed CMOS Static RAM
W24L010A
128K
8 HIGH SPEED CMOS STATIC RAM
Publication Release Date: September 1999
- 1 -
Revision A2
GENERAL DESCRIPTION
The W24L010A is a high speed, low power CMOS static RAM organized as 131072
8 bits that
operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
High speed access time:10/12/15 nS (max.)
Low power consumption:
-
Active: 300 mW (typ.)
Single +3.3V power supply
Fully static operation
All inputs and outputs directly TTL/LVTTL
compatible
Three-state outputs
Available packages: 32-pin 300 mil SOJ,
skinny DIP and TSOP
PIN CONFIGURATIIONS
V
A8
A9
WE
1
2
3
4
5
24
25
26
27
28
NC
A7
A6
A5
A12
A4
A3
A2
A1
6
7
8
9
20
21
22
23
A11
OE
A10
CS1
I/O 8
I/O 7
I/O 6
I/O 5
10
11
12
13
16
17
18
19
A0
I/O 2
I/O 3
I/O 1
14
15
I/O 4
A13
V
A14
A16
32
3 1
30
29
A15
CS2
DD
SS
1
2
3
4
5
6
7
8
9
11
12
14
15
16
A15
A12
A7
A6
A5
A4
A3
A2
A1
V
CS2
WE
A13
A8
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
DQ3
DD
32-pin
TSOP
A11
A9
NC
32
31
30
29
27
26
25
24
23
22
21
20
19
18
17
A14
I/O8
A16
V
SS
DQ2
DQ1
10
13
A0
28
BLOCK DIAGRAM
A0
.
CS1
A16
WE
I/O1
I/O8
OE
C O RE
V
V
.
.
DATA I/O
ARRAY
DECODER
CORE
CS2
.
CONTROL
DD
SS
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0
-
A16
Address Inputs
I/O1
-
I/O8
Data Inputs/Outputs
CS1, CS2
Chip Select Inputs
WE
Write Enable Input
OE
Output Enable Input
V
DD
Power
Supply
V
SS
Ground
NC No
Connection
W24L010A
-
2
-
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER RATING
UNIT
Supply Voltage to V
SS
Potential
-0.5 to +4.6
V
Input/Output to V
SS
Potential
-0.5 to V
DD
+0.5
V
Allowable Power Dissipation
1.0
W
Storage Temperature
-65 to +150
C
Operating Temperature
0 to +70
C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
TRUTH TABLE
CS1
CS2
OE
WE
MODE
I/O1
-
I/O8
V
DD
CURRENT
H X X X Not
Selected
High
Z
I
SB
, I
SB1
X L X X Not
Selected
High
Z
I
SB
, I
SB1
L H H H Output
Disable
High
Z
I
DD
L H L H Read
Data
Out
I
DD
L H X L Write
Data In
I
DD
OPERATING CHARACTERISTICS
(V
DD
= 3.3V
5%, V
SS
= 0V, T
A
= 0 to 70
C)
PARAMETER SYM.
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input Low Voltage
V
IL
-
-0.5
-
+0.8
V
Input High Voltage
V
IH
-
+2.0
-
V
DD
+0.5
V
Input Leakage Current
I
LI
V
IN
= V
SS
to V
DD
-10
-
+10
A
Output Leakage
Current
I
LO
V
I/O
= V
SS
to V
DD
CS1 = V
IH
or CS2 = V
IL
or OE = V
IH
or WE = V
IL
-10
-
+10
A
Output Low Voltage
V
OL
I
OL
= +8.0 mA
-
-
0.4
V
Output High Voltage
V
OH
I
OH
= -4.0 mA
2.4
-
-
V
10 - - 130 mA
Operating Power
Supply Current
I
DD
CS1 = V
IL
,
CS2 = V
IH
I/O = 0 mA
12 - - 120 mA
Cycle
=
MIN
Duty = 100%
15 - - 100 mA
Standby Power
I
SB
CS1 = V
IH
, or CS2 = V
IL
- - 15 mA
Supply Current
I
SB1
CS1
V
DD
-0.2V or
- - 5 mA
CS2
0.2V
Note: Typical characteristics are at V
DD
= 3.3V, T
A
= 25
C.
W24L010A
Publication Release Date: September 1999
- 3 -
Revision A2
CAPACITANCE
(V
DD
= 3.3V, T
A
= 25
C, f = 1 MHz)
PARAMETER SYM.
CONDITIONS
MAX.
UNIT
Input Capacitance
C
IN
V
IN
= 0V
8
pF
Input/Output Capacitance
C
I/O
V
OUT
= 0V
10
pF
Note: These parameters are sampled but not 100% tested.
AC TEST CONDITIONS
PARAMETER CONDITIONS
Input Pulse Levels
0V to 3V
Input Rise and Fall Times
3 nS
Input and Output Timing Reference Level
1.5V
Output Load
C
L
= 30 pF, I
OH
/I
OL
= -4 mA/8 mA
AC TEST LOADS AND WAVEFORM
90%
90%
3 nS
10%
3 nS
10%
R1 320 ohm
3.3V
OUTPUT
R2
350 ohm
30 pF
Including
Jig and
Scope
3.0V
0V
3.3V
OUTPUT
R1 320 ohm
5 pF
Including
Jig and
Scope
R2
350 ohm
(For T
CLZ1,
CLZ2,
OLZ,
CHZ1,
CHZ2,
OHZ,
WHZ,
OW
T
T
T
T
T
T
T
)
W24L010A
-
4
-
AC CHARACTERISTICS
(V
DD
= 3.3V
5%, V
SS
= 0V, T
A
= 0 to 70
C)
Read Cycle
PARAMETER SYM.
W24L010A-
10
W24L010A-
12
W24L010A-
15
UNIT
MIN. MAX. MIN. MAX. MIN. MAX.
Read Cycle Time
T
RC
10 - 12 - 15 - nS
Address Access Time
T
AA
- 10 - 12 - 15 nS
Chip Select Access Time
CS1
T
ACS1
- 10 - 12 - 15 nS
CS2
T
ACS2
- 10 - 12 - 15 nS
Output Enable to Output Valid
T
AOE
- 5 - 6 - 7 nS
Chip Selection to Output in
CS1
T
CLZ1*
3 - 3 - 3 - nS
Low Z
CS2
T
CLZ2*
3 - 3 - 3 - nS
Output Enable to Output in Low Z
T
OLZ*
0 - 0 - 0 - nS
Chip Deselection to Output in
CS1
T
CHZ1*
- 5 - 6 - 7 nS
High Z
CS2
T
CHZ2*
- 5 - 6 - 7 nS
Output Disable to Output in High Z
T
OHZ*
- 5 - 6 - 7 nS
Output Hold from Address Change
T
OH
3 - 3 - 3 - nS
*
These parameters are sampled but not 100% tested.
Write Cycle
PARAMETER SYM.
W24L010A-
10
W24L010A-
12
W24L010A-
15
UNIT
MIN. MAX. MIN. MAX. MIN. MAX.
Write Cycle Time
T
WC
10 - 12 - 15 - nS
Chip Selection to End of
CS1
T
CW1
9 - 10 - 13 nS
Write CS2
T
CW2
9 - 10 - 13 - nS
Address Valid to End of Write
T
AW
9 - 10 - 13 - nS
Address Setup Time
T
AS
0 - 0 - 0 nS
Write Pulse Width
T
WP
9 - 10 - 10 - nS
Write Recovery
CS1
,
WE
T
WR1
0 - 0 - 0 - nS
Time
CS2
T
WR2
0 - 0 - 0 - nS
Data Valid to End of Write
T
DW
5 - 7 - 9 - nS
Data Hold from End of Write
T
DH
0 - 0 - 0 - nS
Write to Output in High Z
T
WHZ
*
- 5 - 6 - 8 nS
Output Disable to Output in High Z
T
OHZ
*
- 5 - 6 - 8 nS
Output Active from End of Write
T
OW
0 - 0 - 0 - nS
*
These parameters are sampled but not 100% tested.
W24L010A
Publication Release Date: September 1999
- 5 -
Revision A2
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
Address
T
T
T
T
D
OH
AA
RC
OH
OUT
Read Cycle 2
(Chip Select Controlled)
CS1
CS2
D
T
T
T
T
T
T
ACS1
ACS2
CLZ1
CLZ2
CHZ1
CHZ2
OUT
Read Cycle 3
(Output Enable Controlled)
Address
T
OE
CS1
CS2
D
T
T
T
T
T
T
T
T
T
T
T
OH
CHZ1
CHZ2
OHZ
AA
RC
AOE
CLZ1
ACS1
ACS2
CLZ2
OLZ
OUT
W24L010A
-
6
-
Timing Waveforms, continued
Write Cycle 1
(OE Clock)
Address
OE
CS1
CS2
WE
D
D
T
T
(1, 4)
OUT
IN
OHZ
WC
T
WR1
T
CW1
T
CW2
T
AW
T
WP
T
WR2
T
AS
T
DW
T
DH
Write Cycle 2
(OE = V
IL
Fixed)
Address
CS1
CS2
WE
D
D
T
T
T
T
T
T
T
T
T
T
T
(2)
(3)
T
T
WC
CW1
WR1
CW2
AW
WP
WR2
OW
WHZ (1, 4)
DW
DH
OH
AS
OUT
IN
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from D
OUT
are the same as the data written to D
IN
during the write cycle.
3. Dout provides the read data for the next address.
4. Transition is measured
500 mV from steady state with C
L
= 5 pF. This parameter is guaranteed but not 100% tested.
W24L010A
Publication Release Date: September 1999
- 7 -
Revision A2
ORDERING INFORMATION
PART NO.
ACCESS
TIME (nS)
OPERATING
CURRENT
MAX. (mA)
STANDBY
CURRENT
MAX. (mA)
PACKAGE
W24L010AK-10
10
130
5
300 mil skinny DIP
W24L010AK-12
12
120
5
300 mil skinny DIP
W24L010AK-15
15
100
5
300 mil skinny DIP
W24L010AJ-10
10
130
5
300 mil SOJ
W24L010AJ-12
12
120
5
300 mil SOJ
W24L010AJ-15
15
100
5
300 mil SOJ
W24L010AT-10
10
130
5
Type one TSOP
W24L010AT-12
12
120
5
Type one TSOP
W24L010AT-15
15
100
5
Type one TSOP
Notes:
1. Winbond reserves the right to make changes to its products without prior notice.
2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications
where personal injury might occur as a consequence of product failure.
- 8 -
PACKAGE DIMENSIONS
32-pin SOJ
D
H
B
b
e
e
1
16
17
32
E
Y
A
A
A
Seating Plane
c
L
S
Symbol
Dimension in mm
Dimension in Inches
Min.
Nom.
Max.
Min.
Nom.
Max.
A
A
A
B
b
c
D
E
e
e
H
L
S
Y
0.140
0.020
0.095
0.100
0.105
0.032
0.028
0.026
0.022
0.018
0.016
0.014
0.010
0.008
0.835
0.825
0.305
0.300
0.295
0.056
0.050
0.044
0.287
0.267
0.247
0.345
0.335
0.325
0.080
0.045
0.004
0
10
0.815
3.556
0.508
2.413
2.540
2.667
0.813
0.711
0.660
0.559
0.457
0.406
0.356
0.254
0.203
21.209
20.955
7.747
7.620
7.493
1.422
1.270
1.118
7.290
6.782
6.274
8.763
8.509
8.255
2.032
1.143
0.102
0
10
20.701
__
__
__
__
__
__
__
__
1
2
1
e
e
1
2
1
W24L010A
W24L010A
Publication Release Date: September 1999
- 9 -
Revision A2
Package Dimensions, continued
32-pin TSOP
A
A
A
2
1
L
L
1
Y
c
E
H
D
D
b
e
M
0.10(0.004)
Min.
Nom.
Max.
Min.
Nom.
Max.
Symbol
A
A
b
c
D
E
e
L
L
Y
1
1
2
A
H
D
Note:
Controlling dimension: Millimeter
Dimension in Inches
0.047
0.006
0.041
0.039
0.037
0.007
0.008
0.009
0.005
0.006
0.007
0.720
0.724
0.728
0.311
0.315
0.319
0.780
0.787
0.795
0.020
0.016
0.020
0.024
0.031
0.000
0.004
1
3
5
0.002
1.20
0.05
0.15
1.05
1.00
0.95
0.17
0.12
18.30
7.90
19.80
0.40
0.00
1
0.20
0.23
0.15
0.17
18.40
18.50
8.00
8.10
20.00
20.20
0.50
0.50
0.60
0.80
0.10
3
5
Dimension in mm
__
__
__
__
__
__
__
__
__
__
__
__
__
__
__
__
PDF 
ZIP