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Электронный компонент: W6810IE

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Publication Release Date: October 10, 2002
- 1 -
Revision A9
W6810
SINGLE-CHANNEL VOICEBAND CODEC
Preliminary Data Sheet
W6810
- 2 -
1. GENERAL DESCRIPTION
The W6810 is a general-purpose single channel PCM CODEC with pin-selectable
-Law or A-Law
companding. The device is compliant with the ITU G.712 specification. It operates off of a single +5V
power supply and is available in 20-pin PDIP, SOG, SSOP, and TSSOP package options. Functions
performed include digitization and reconstruction of voice signals, and band limiting and smoothing
filters required for PCM systems. The filters are compliant with ITU G.712 specification. W6810
performance is specified over the industrial temperature range of 40
C to +85C.

The W6810 includes an on-chip precision voltage reference and an additional power amplifier,
capable of driving 300
loads differentially up to a level of 6.3V peak-to-peak. The analog section is
fully differential, reducing noise and improving the power supply rejection ratio. The data transfer
protocol supports both long-frame and short-frame synchronous communications for PCM
applications, and IDL and GCI communications for ISDN applications. W6810 accepts seven master
clock rates between 256 kHz and 4.096 MHz, and an on-chip pre-scaler automatically determines the
division ratio for the required internal clock.

For fast evaluation and prototyping purposes, the W6810DK development kit is available.
2. FEATURES
Single +5V power supply
Typical power dissipation of 25 mW,
power-down mode of 0.5
W
Fully-differential analog circuit design
On-chip precision reference of 1.575 V for
a 0 dBm TLP at 600
Push-pull power amplifiers with external
gain adjustment with 300
load capability
Seven master clock rates of 256 kHz to
4.096 MHz
Pin-selectable
-Law and A-Law
companding (compliant with ITU G.711)
CODEC A/D and D/A filtering compliant
with ITU G.712
Industrial temperature range (40C to
+85
C)
Four packages: 20-pin PDIP, SOG, SSOP,
and TSSOP
APPLICATIONS
Digital Telephone Systems
Central Office Equipment (Gateways,
Switches, Routers)
PBX Systems (Gateways, Switches)
PABX/SOHO Systems
Local Loop card
SOHO Routers
VoIP Terminals
Enterprise Phones
ISDN Terminals
Analog line cards
Digital Voice Recorders
W6810
Publication Release Date: October 10, 2002
- 3 -
Revision A9
3. BLOCK DIAGRAM
256 kHz,
512 kHz,
1536 kHz,
1544 kHz,
2048 kHz,
2560 kHz
& 4096 kHz
MCLK
256 kHz
8 kHz
512 kHz
Pre - scaler
V
DD
V
SS
Power Conditioning
Voltage reference
V
AG
PUI
G.712 CODEC
G.711
/A -Law
PAO+
PAO-
PAI
RO-
AO
AI+
AI-
/A-Law
Tra
ns
mit
PC
M
Int
erf
ace
Re
cei
ve
PC
M
Int
erf
ace
FST
BCLKT
PCMT
FSR
BCLKR
PCMR
V
REF
256 kHz,
512 kHz,
1536 kHz,
1544 kHz,
2048 kHz,
2560 kHz
& 4096 kHz
MCLK
256 kHz
8 kHz
Pre - Scaler
Power Conditioning
Voltage reference
V
AG
G.712 CODEC
G.711
/A -Law
RO
/A-Law
G.712 CODEC
G.711
/A -Law
RO
/A-Law
Tr
ansmit
PCM
Int
e
rface
Re
ce
ive
PCM
In
t
e
rface
BCLKT
BCLKT
BCLKR
V
W6810
- 4 -
4. TABLE OF CONTENTS
1. GENERAL DESCRIPTION.................................................................................................................. 2
2. FEATURES ......................................................................................................................................... 2
3. BLOCK DIAGRAM .............................................................................................................................. 3
4. TABLE OF CONTENTS ...................................................................................................................... 4
5. PIN CONFIGURATION ....................................................................................................................... 6
6. PIN DESCRIPTION............................................................................................................................. 7
7. FUNCTIONAL DESCRIPTION............................................................................................................ 8
7.1. Transmit Path............................................................................................................................. 8
7.2. Receive Path.............................................................................................................................. 9
7.3. Power Management................................................................................................................. 10
7.3.1. Analog and Digital Supply .............................................................................................. 10
7.3.2. Analog Ground Reference Bypass................................................................................. 10
7.3.3. Analog Ground Reference Voltage Output .................................................................... 10
7.4. PCM Interface .......................................................................................................................... 10
7.4.1. Long Frame Sync ........................................................................................................... 11
7.4.2. Short Frame Sync .......................................................................................................... 11
7.4.3. GCI Interface .................................................................................................................. 11
7.4.4. IDL Interface................................................................................................................... 12
7.4.5. System Timing................................................................................................................ 12
8. TIMING DIAGRAMS.......................................................................................................................... 13
9. ABSOLUTE MAXIMUM RATINGS.................................................................................................... 20
9.1. Absolute Maximum Ratings ..................................................................................................... 20
9.2. Operating Conditions ............................................................................................................... 20
10. ELECTRICAL CHARACTERISTICS ............................................................................................... 21
10.1. General Parameters .............................................................................................................. 21
10.2. Analog Signal Level and Gain Parameters............................................................................ 22
10.3. Analog Distortion and Noise Parameters .............................................................................. 23
10.4. Analog Input and Output Amplifier Parameters ..................................................................... 24
10.5. Digital I/O ............................................................................................................................... 26
10.5.1. -Law Encode Decode Characteristics........................................................................ 26
10.5.2. A-Law Encode Decode Characteristics ....................................................................... 27
10.5.3. PCM Codes for Zero and Full Scale ............................................................................ 28
10.5.4. PCM Codes for 0dBm0 Output .................................................................................... 28
11. TYPICAL APPLICATION CIRCUIT................................................................................................. 29
12. PACKAGE SPECIFICATION .......................................................................................................... 31
W6810
Publication Release Date: October 10, 2002
- 5 -
Revision A9
12.1. 20L TSSOP 4.4X6.5mm ..................................................................................................... 31
12.2. 20L SOP 300mil.................................................................................................................. 32
12.3. 20L SSOP 209mil ............................................................................................................... 33
12.4. 20L PDIP................................................................................................................................ 34
13. ORDERING INFORMATION........................................................................................................... 35
14. VERSION HISTORY ....................................................................................................................... 36