W682510/W682310
1. GENERAL DESCRIPTION
The W682510 and W682310 are general-purpose dual channel PCM CODECs with pin-selectable
-
Law or A-Law companding. The device is compliant with the ITU G.712 specification. It operates from
a single power supply (+5V for the W682510, +3V for the W682310) and is available in 20-pin PDIP
(W682510 only), SSOP, and 24-pin SOP package options. Functions performed include digitization
and reconstruction of voice signals, and band limiting and smoothing filters required for PCM systems.
The filters are compliant with ITU G.712 specification. The W682510 and W682310 performance is
specified over the industrial temperature range of 40
C to +85
C.
The W682510 includes an on-chip precision voltage reference and receive output buffer amplifiers,
capable of driving 600
loads (line transformers.) The analog section is fully differential, reducing
noise and improving the power supply rejection ratio. The data transfer protocol supports either
parallel or serial synchronous communications for PCM applications. The W682510 and W682310
have a build in PLL that eliminates the need for a master clock and automatically determines the
division ratio for the required internal clock.
For fast evaluation and prototyping purposes, the W682510DK & W682310DK development kits are
available.
2. FEATURES
Single power supply
o
4.5V to 5.5V (W682510)
o
2.7V to 3.8V (W682310)
Typical power dissipation of 35 mW,
power-down mode of 5
W
Fully-differential analog circuit design
On-chip precision reference-
o
W682510: 1.73V for a 0.8 dBm
0TLP at 600
o
W682310: 1.41V reference for a
0TLP of 3.8 dBm into 1200
Pin-selectable
-Law and A-Law
companding (compliant with ITU G.711)
CODEC A/D and D/A filtering compliant
with ITU G.712
Industrial temperature range (40
C to
+85
C)
Three packages: 20-pin SSOP, 20-pin
PDIP, and 24-pin SOP
APPLICATIONS
Digital Telephone Systems
Central Office Equipment (Gateways,
Switches, Routers)
PBX Systems (Gateways, Switches)
PABX/SOHO Systems
Hands free system
Speakerphone devices
VoIP Terminals
Enterprise Phones
ISDN Terminals
Analog line cards
- 2 -
W682510/W682310
4. TABLE OF CONTENTS
1. GENERAL DESCRIPTION.................................................................................................................. 2
1. GENERAL DESCRIPTION.................................................................................................................. 2
2. FEATURES.......................................................................................................................................... 2
3. BLOCK DIAGRAM.............................................................................................................................. 3
4. TABLE OF CONTENTS ...................................................................................................................... 4
5. PIN CONFIGURATION ....................................................................................................................... 6
6. PIN DESCRIPTION ............................................................................................................................. 7
7. FUNCTIONAL DESCRIPTION............................................................................................................ 8
7.1. Transmit Path
............................................................................................................................. 8
7.1.1. AI1, AI2, AO1-, AO2- .............................................................................................................. 9
7.1.2. PCMT1 ................................................................................................................................... 9
7.1.3. PCMT2 ................................................................................................................................. 10
7.2. Receive Path
............................................................................................................................ 10
7.2.1. RO1, RO2............................................................................................................................. 10
7.2.2. PCMR1 ................................................................................................................................. 11
7.2.3. PCMR2 ................................................................................................................................. 11
7.3. Power Signals
.......................................................................................................................... 11
7.3.1. V
DD
........................................................................................................................................ 11
7.3.2. V
SSA
....................................................................................................................................... 11
7.3.3. V
SSD
....................................................................................................................................... 11
7.3.4. V
REF
....................................................................................................................................... 12
7.3.5. PUI........................................................................................................................................ 12
7.4. PCM Interface
.......................................................................................................................... 12
7.4.1.
/A-Law ................................................................................................................................ 12
7.4.2. BCLK .................................................................................................................................... 13
7.4.3. FSR....................................................................................................................................... 13
7.4.4. FST ....................................................................................................................................... 13
7.4.5. PCMMS ................................................................................................................................ 13
7.5. Power State Modes
................................................................................................................. 13
7.5.1. Power Save Mode ................................................................................................................ 13
7.5.2. Power Down Mode ............................................................................................................... 14
7.5.3. Power Save/Down Output pin state ..................................................................................... 14
8. TIMING DIAGRAMS.......................................................................................................................... 15
9. ABSOLUTE MAXIMUM RATINGS ................................................................................................... 19
- 4 -
W682510/W682310
10. ELECTRICAL CHARACTERISTICS .............................................................................................. 20
10.1. General Parameters W682510 4.5V 5.5V
................................................................ 20
10.2. General Parameters W682310 2.7V 3.8V
................................................................ 20
10.3. Analog Signal Level and Gain Parameters
....................................................................... 22
10.4. Analog Distortion and Noise Parameters
.......................................................................... 24
10.5. Analog Input and Output Amplifier Parameters
................................................................ 25
10.6. Digital I/O
................................................................................................................................ 26
11. TYPICAL APPLICATION CIRCUIT ................................................................................................29
12. PACKAGE DRAWING AND DIMENSIONS ................................................................................... 31
12.1. 20L (PDIP) Plastic Dual Inline Package Dimensions (W682510 only)
......................... 31
12.2. 20L SSOP 209 mil Shrink Small Outline Package Dimensions
.................................. 32
12.3. 24 SOP 300 mil
.................................................................................................................. 33
13. ORDERING INFORMATION........................................................................................................... 34
14. VERSION HISTORY........................................................................................................................ 35
Publication Release Date: May 2003
- 5 -
Revision 0.35
PDF 
ZIP
