W91330N SERIES
TONE/PULSE DIALER WITH HANDFREE
LOCK AND KEY TONE FUNCTIONS
Publication Release Date: May 1997
- 1 -
Revision A2
GENERAL DESCRIPTION
The W91330N series are Si-gate CMOS ICs that provide the necessary signals for tone or pulse
dialing. They feature one-key redial, handfree dialing, key tone, redial, and lock functions.
FEATURES
DTMF/pulse switchable dialer
32-digit redial memory
Pulse-to-tone (*/T) keypad for long distance call operation
Uses 5
4 keyboard
Easy operation with redial, flash, pause, and */T keypads
Pause, pulse-to-tone (*/T) can be stored as a digit in memory
0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out
Off-hook delay 300 mS in lock mode (
DP
will keep low for 300 mS low while off hook)
First key-in delay 300 mS output in lock mode
Dialing rate (10, 20 ppS ) selected by bonding option
Minimum tone output duration: 93 msec.
Minimum intertone pause: 93 msec.
Flash break time (73, 100, 300, 600 msec.) selectable by keypad; pause time is 1.0 sec.
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 18 or 20-pin plastic DIP
The different dialers in the W91330N series are shown in the following table:
TYPE NO.
REPLACEMENT
TYPE NO.
PULSE
(ppS)
FLASH
(mS)
M/B
KEY
TONE
HANDFREE
DIALING
LOCK
PACKAGE
(PINS)
W91330N
W91330
10
600/100/300/73
Pin
Yes
-
-
18
W91331N
W91331
20
600/100/300/73
Pin
Yes
-
-
18
W91330AN
W91330A
10
600/100/300/73
Pin
Yes
Yes
-
20
W91331AN
W91331A
20
600/100/300/73
Pin
Yes
Yes
-
20
W91330LN
W91330L
10
600/100/300/73
Pin
-
-
Yes
20
W91330ALN
W91330AL
10
600/100/300/73
Pin
-
Yes
Yes
20
W91330N SERIES
- 2 -
PIN CONFIGURATIONS
C1
C2
C3
C4
SS
V
XT
XT
1
2
3
4
5
6
7
8
9
T/P MUTE
10
HFI
HKS
DTMF
MODE
R4
R3
R2
R1
V
DD
DP
13
18
20
19
17
16
15
14
12
11
HFO
C1
C2
C3
C4
SS
V
XT
XT
1
2
3
4
5
6
7
8
9
T/P MUTE
HKS
DTMF
MODE
R4
R3
R2
R1
V
DD
DP
12
18
17
16
15
14
10
11
13
LOCK
W91330AN/W91331AN
W91330ALN
W91330LN
W91330N/W91331N
C1
C2
C3
C4
SS
V
XT
XT
1
2
3
4
5
6
7
8
9
T/P MUTE
10
HFI
HKS
DTMF
MODE
R4
R3
R2
R1
V
DD
DP
13
18
20
19
17
16
15
14
12
11
HFO
LOCK
KT
C1
C2
C3
C4
SS
V
XT
XT
1
2
3
4
5
6
7
8
9
T/P MUTE
HKS
DTMF
MODE
R4
R3
R2
R1
V
DD
DP
12
18
17
16
15
14
10
11
13
KT
W91330N SERIES
Publication Release Date: May 1997
- 3 -
Revision A2
PIN DESCRIPTION
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
Column-
Row
Inputs
1
-
4
&
15
-
18
1
-
4
&
17
-
20
I
The keyboard inputs may be used with either the
standard 5
4 keyboard or the inexpensive single
contact (Form A) keyboard. Electronic input from a
C can also be used.
A valid key-in is defined as a single row being
connected to a single column.
XT, XT
7, 8
7, 8
I, O
A built-in inverter provides oscillation with an
inexpensive 3.579545 MHz crystal or ceramic
resonator.
T/P
MUTE
9
9
O
The T/P MUTE is a conventional CMOS N-channel
open drain output.
The output transistor is switched on during dialing
sequence, one-key redial break, and flash break
time. Otherwise, it is switched off.
MODE
13
15
I
Pulling mode pin to V
SS
places the dialer in tone
mode.
Pulling mode pin to V
DD
places the dialer in pulse
mode. (10 ppS; 20 ppS for W91331N/W91331AN,
M/B = 40:60)
Floating mode pin places the dialer in pulse mode.
(10 ppS; 20 ppS for W91331N/W91331AN, M/B =
33.3:66.7).
HKS
10
12
I
Hook switch input.
HKS = V
DD
: On-hook state. Chip in sleeping mode,
no operation.
HKS = V
SS
: Off-hook state. Chip enabled for normal
operation.
HKS pin is pulled to V
DD
by internal resistor.
DP
11
13
O
N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either tone
mode or pulse mode.
The timing diagram for pulse mode is shown in
Figure 1(a, b, c, d).
V
DD
, V
SS
14, 6
16, 6
I
Power input pins.
W91330N SERIES
- 4 -
Pin Description, continued
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
DTMF
12
14
O
In pulse mode, this pin remains in low state at all
times. In tone mode, it will output a dual or single
tone. Detailed timing diagram for tone mode is
shown in Figure 2(a, b, c, d).
Specified
Actual
Error %
Output Frequency
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
699
766
848
948
1216
1332
1472
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
HFI, HFO
-
10, 11
I, O
Handfree control pins. The handfree control state is
toggled on by a low pulse on the HFI input pin. The
status of the handfree control state is described in
the following table:
CURRENT STATE
Input
HFO Dialing
High
Yes
On Hook
High
Low
No
Off Hook
High
Low
Yes
On Hook
Off Hook
Low
Yes
Off Hook
Low
On Hook
Low
No
Off Hook
High
On Hook
High
Yes
Low
Hook SW.
HFO
NEXT STATE
HFI
HFI
HFI
HFI pin is pulled to V
DD
by internal resistor.
Detailed timing diagrams are shown in Figure 3.
KT
5
(except
W91330LN)
5
(except
W91330ALN)
O
Key-tone signal output. The key tone is generated
for all valid keys. Frequency is 600 Hz and duration
is 35 mS.
W91330N SERIES
Publication Release Date: May 1997
- 5 -
Revision A2
Pin Description, continued
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
LOCK
5
(
W91330LN
only
)
5
(
W91330ALN
only
)
I
The function of this terminal is to prevent "0" dialing
and "9" dialing under PABX system long distance
call control. When the first key input after reset is 0
or 9, all key inputs, including the 0 or 9 key, become
invalid and the chip generates no output. The
telephone is reinitialized by a reset.
LOCK PIN
FUNCTION
Floating
Normal dialing mode
V
DD
V
SS
"0," "9" dialing inhibited
"0" dialing inhibited
BLOCK DIAGRAM
ROW
COLUMN
DTMF
XT
XT
MODE
RAM
COUNTER
SYSTEM CLOCK
GENERATOR
LOCATION
LATCH
D/A
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
READ/WRITE
(R1 to R4, Vx)
(C1 to C4)
T/P MUTE
HFO
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
KEYBOARD
INTERFACE
CONVERTER
LOCK
HKS
HFI
DP
KT
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