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Электронный компонент: W91521N

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W91520N SERIES
TONE/PULSE DIALER WITH HANDFREE
AND HOLD FUNCTIONS
Publication Release Date: May 1997
- 1 -
Revision A3
GENERAL DESCRIPTION
The W91520N series are Si-gate CMOS ICs that provide the necessary signals for tone or pulse
dialing. The W91520N series provide one-key redial, handfree dialing, hold, save, and redial
functions.
FEATURES
DTMF/pulse switchable dialer
Two by 32-digit redial and save memory
Pulse-to-tone (*/T) keypad for long distance call operation
Uses 5
5 keyboard
Easy operation with redial, flash, pause, and */T keypads
Pause, pulse-to-tone (*/T) can be stored as a digit in memory
On-hook debounce time: 150 mS
Dialing rate (10 ppS, or 20 ppS) selectable by bonding option
Minimum tone output duration: 93 msec.
Minimum intertone pause: 93 msec.
Flash break time (73, 100, 300, 600 msec.) selectable by keypad; pause time is 1.0 sec.
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 18 or 20-pin plastic DIP
The different dialers in the W91520N series are shown in the following table:
TYPE NO.
REPLACEMENT
TYPE NO.
PULSE
(ppS)
FLASH
(mS)
M/B
HANDFREE
DIALING
PACKAGE
(PINS)
W91520N
W91520
10
600/100/300/73
Pin
-
18
W91521N
W91521
20
600/100/300/73
Pin
-
18
W91520AN
W91520A
10
600/100/300/73
Pin
Yes
20
W91521AN
W91521A
20
600/100/300/73
Pin
Yes
20
W91520N SERIES
- 2 -
PIN CONFIGURATIONS
C4
1
2
3
4
5
6
7
8
9
10
HKS
DTMF
MODE
R4
R3
R2
R1
V
DD
13
18
20
19
17
16
15
14
12
11
HFO
W91520AN/W91521AN
C1
C2
C3
SS
V
XT
XT
T/P MUTE
HFI
H/P MUTE
DP/C5
W91520N/W91521N
1
2
3
4
5
6
7
8
9
HKS
DTMF
MODE
R4
R3
R2
R1
V
DD
12
18
17
16
15
14
10
11
13
C1
C2
C3
C4
SS
V
XT
XT
T/P MUTE
H/P MUTE
DP/C5
PIN DESCRIPTION
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
Column-
Row
Inputs
1
-
4
&
15
-
18
1
-
4
&
17
-
20
I
The keyboard inputs may be used with either a
standard 5
5 keyboard or an inexpensive single
contact (Form A) keyboard. Electronic input from a
C
can also be used. A valid key-in is defined as a single
row being connected to a single column.
XT, XT
7, 8
7, 8
I, O
A built-in inverter provides oscillation with an
inexpensive 3.579545 MHz crystal or ceramic
resonator.
T/P MUTE
9
9
O
The T/P MUTE is a conventional CMOS N-channel
open drain output.
The output transistor is switched on during dialing
sequence, one-key redial break, and flash break time.
Otherwise, it is switched off.
MODE
13
15
I
Pulling mode pin to V
SS
places the dialer in tone
mode.
Pulling mode pin to V
DD
places the dialer in pulse
mode (10 ppS; 20 ppS for W91521N/521AN, M/B =
40:60).
Floating mode pin places the dialer in pulse mode
(10 ppS; 20 ppS for W91521N/521AN, M/B =
33.3:66.7).
W91520N SERIES
Publication Release Date: May 1997
- 3 -
Revision A3
Pin Description, continued
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
HKS
10
12
I
Hook switch input.
HKS = V
DD
: On-hook state. Chip in sleeping mode, no
operation.
HKS = V
SS
: Off-hook state. Chip is enabled for normal
operation.
HKS pin is pulled to V
DD
by internal resistor.
DP / C5
11
13
O
N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either tone
mode or pulse mode.
The timing diagram for pulse mode is shown in Figure
1(a, b, c).
V
DD
, V
SS
14, 6
16, 6
I
Power input pins.
H/P MUTE
5
5
O
The H/P MUTE is a conventional inverter output.
During pulse dialing, flash break, one-key redial break,
and hold period, this output is active high; otherwise, it
remains in low state.
DTMF
12
14
O
In pulse mode, this pin remains in low state at all times.
In the tone mode, it will output a dual or single tone.
Detailed timing diagram for tone mode is shown in
Figure 2(a, b, c).
Specified
Actual
Error %
Output Frequency
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
699
766
848
948
1216
1332
1472
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
W91520N SERIES
- 4 -
Pin Description, continued
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
HFI, HFO
-
10, 11
I, O
Handfree control pins. The handfree control state is
toggled on by a low pulse on the HFI input pin. The
status of the handfree control state is described in the
following table:
CURRENT STATE
Input
HFO
Dialing
High
Yes
On Hook
High
Low
No
Off Hook
High
Low
Yes
On Hook
Off Hook
Low
Yes
Off Hook
Low
On Hook
Low
No
Off Hook
High
On Hook
High
Yes
Low
Hook SW.
HFO
NEXT STATE
HFI
HFI
HFI
HFI pin is pulled to V
DD
by an internal resistor.
Detailed timing diagrams are shown in Figure 3.
BLOCK DIAGRAM
ROW
COLUMN
DTMF
XT
XT
RAM
COUNTER
SYSTEM CLOCK
GENERATOR
LOCATION
LATCH
D/A
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
READ/WRITE
(R1 to R4, Vx)
(C1 to C4)
T/P MUTE
HFO
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
KEYBOARD
INTERFACE
CONVERTER
MODE
HKS
HFI
DP/C5
H/P MUTE
W91520N SERIES
Publication Release Date: May 1997
- 5 -
Revision A3
FUNCTIONAL DESCRIPTION
Keyboard Operation
C1
C2
C3
C4
DP C5
/
1
2
3
SAVE
R1
4
5
6
F1
R2
7
8
9
F2
H
R3
/T
0
#
R/P1
R
R4
R/P2
R
F3
F4
V
X
R/P1, R/P2: Redial and pause function key; P1 is 3.6 sec. and P2 is 2.0 sec.
/T:
in tone mode and P
T in pulse mode
F1, ..., F4: Flash keys, flash break time of F1 = 600 mS, F2 = 100 mS, F3 = 300 mS, F4 = 73 mS
H: Hold function key
SAVE: Save function key
R: One-key redial function
Notes:
D1, ..., Dn, D1', ..., Dn': 0, ..., 9, */T, #
R/P: R/P1 or R/P2.
Fn: F1, ..., F4
Normal Dialing
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
1. D1, D2, ..., Dn will be dialed out.
2. Dialing length is unlimited, but redial is inhibited if length exceeds 32 digits in normal dialing.
Redialing
1.
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
, Busy, Come
ON
HOOK
,
OFF HOOK
(or
ON
HOOK
&
HFI
),
R/P
a. The redial memory content will be dialed out.
b. The
R/P
key can execute the redial function only as the first key-in after off-hook; otherwise, it
executes pause function.
c. If redialing length exceeds 32 digits, the redialing function will be inhibited.
2.
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
, Busy,
R
a. The one-key redialing function timing diagram is shown in Figure 4.
W91520N SERIES
- 6 -
b. If the dialing
of
D1
to
Dn
is finished, pressing the
R
key will cause the pulse output pin
to
go low for 2.2 seconds break time and 0.6 seconds pause time will automatically be added.
c. If the pulses of the dialed digits
D1
to
Dn
have not finished,
R
will be ignored.
d. The redial function by
R
key has no break time (2.2 sec.) if it is the first key-in after off-hook.
e. The
R
key uses the same redial buffer as the redial function by
the
R/P1
or
R/P2
key,
and it is active during normal dialing or repertory dialing.
Access Pause
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
,
R/P
,
D3
, ...,
Dn
1. The pause function is executed in normal dialing, redial dialing, or memory dialing.
2. The pause duration of 2.0 or 3.6 seconds per pause is selected by keypad, but only one pause time
can be stored in memory
3. A detailed timing diagram for the pause function is shown in Figure 5.
Pulse-to-tone (*/T)
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
,
*/T
,
D1'
,
D2'
, ...,
Dn'
1. If the mode switch is set to pulse mode, then the output signal will be:
D1, D2, ..., Dn, Pause (2.0 sec. or 3.6 sec.), D1', D2', ..., Dn'
(Pulse)
(Tone )
2. If the mode switch is set to tone mode, then the output signal will be:
D1, D2, ..., Dn, *, D1', D2', ..., Dn'
(Tone)
(Tone)
3. The dialer remains in tone mode when the digits have been dialed out and can be reset to pulse
mode only by going on-hook.
4. The pulse-to-tone function timing diagram is shown in Figure 6.
Save
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
,
SAVE
1. D1, D2, ..., Dn will be dialed out.
2. If the sequence of the dialed digits D1, D2, ..., Dn has not
SAVE
will be ignored;
W91520N SERIES
Publication Release Date: May 1997
- 7 -
Revision A3
finished,
otherwise, D1, D2, ..., Dn will be duplicated to the save memory.
Flash
OFF HOOK
(or
ON HOOK
&
HFI
),
Fn
1. Fn = F1, ..., F4
2. The dialer will execute a flash break time of 600 mS (F1), 100 mS (F2), 300 mS (F3), or 73 mS
(F4). In each case the flash pause time is 1.0 sec. before the next digit is dialed out.
3. Flash key cannot be stored as a digit in memory. The flash key has first priority among the
keyboard
functions.
4. The system will return to the initial state after the flash pause time is finished.
5. The flash function timing diagram is shown in Figure 7.
HOLD
OFF HOOK
(or
ON HOOK
&
HFI
),
H
The HOLD is switched on and off by hold key. The other keypads will be disabled when in hold mode.
The function timing diagram is shown in Figure 3(a, b, c).
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
UNIT
DC Supply Voltage
V
DD
-
V
SS
-0.3 to +7.0
V
Input/Output Voltage
V
IL
V
SS
-0.3
V
V
IH
V
DD
+0.3
V
V
OL
V
SS
-0.3
V
V
OH
V
DD
+0.3
V
Power Dissipation
P
D
120
mW
Operation Temperature
T
OPR
-20 to +70
C
Storage Temperature
T
STG
-55 to +150
C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
W91520N SERIES
- 8 -
DC CHARACTERISTICS
(V
DD
-
V
SS
= 2.5V, F
OSC.
= 3.579545 MHz, T
A
= 25
C, all outputs unloaded)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Operating Voltage
V
DD
-
2.0
-
5.5
V
Operating Current
I
OP
Tone, Unloaded
-
0.4
0.6
mA
Pulse, Unloaded
-
0.2
0.4
Standby Current
I
SB
HKS = V
SS
, No load
& No key entry
-
-
15
A
Memory Retention
Current
I
MR
HKS = V
DD
,
V
DD
= 1.0V
-
-
0.2
A
DTMF Output Voltage
V
TO
Row group,
R
L
= 5 K
130
150
170
mVrms
Pre-emphasis
Col/Row,
V
DD
= 2.0 to 5.5V
1
2
3
dB
DTMF Distortion
THD
R
L
= 5 K
,
V
DD
= 2.0 to 5.5V
-
-30
-23
dB
DTMF Output DC Level
V
TDC
R
L
= 5 K
,
V
DD
= 2.0 to 5.5V
1.0
-
3.0
V
DTMF Output Sink
Current
I
TL
V
TO
= 0.5V
0.2
-
-
mA
DP Output Sink Current
I
PL
V
PO
= 0.5V
0.5
-
-
mA
T/P MUTE Output Sink
Current
I
TML
V
TMO
= 0.5V
0.5
-
-
mA
H/P MUTE Output
I
HPH
V
HPH
= 2.0V
0.5
-
-
mA
Drive/Sink Current
I
HPL
V
HPL
= 0.5V
0.5
-
-
mA
HFO Drive/Sink Current
I
HFH
V
HFH
= 2.0V
0.5
-
-
mA
I
HFL
V
HFL
= 0.5V
0.5
-
-
mA
Keypad Input Drive
Current
I
KD
V
I
= 0.0V
30
-
-
A
Keypad Input Sink
Current
I
KS
V
I
= 2.5V
200
400
-
A
HKS I/P Pull-high
Resistor
R
HK
-
-
300
-
K
Keypad Resistance
R
K
-
-
-
5
K
W91520N SERIES
Publication Release Date: May 1997
- 9 -
Revision A3
AC CHARACTERISTICS
(V
DD
-
V
SS
= 2.5V, F
OSC.
= 3.579545 MHz, T
A
= 25
C, all outputs unloaded)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Key-in Debounce
T
KID
-
-
20
-
mS
Key Release Debounce
T
KRD
-
-
20
-
mS
On-hook Debounce
T
OHD
-
-
150
-
mS
Pre-digit Pause
1
T
PDP1
Mode = V
DD
-
40
-
mS
10 ppS
Mode = Floating
-
33.3
-
Pre-digit Pause
2
T
PDP2
Mode = V
DD
-
20
-
mS
20 ppS
Mode = Floating
-
16.7
-
Interdigit Pause
T
IDP
10 ppS
-
800
-
mS
(Auto Dialing)
20 ppS
-
500
-
Make/Break Ratio
M:B
Mode = V
DD
-
40:60
-
%
Mode = Floating
-
33.3:66.7
-
Tone Output Duration
T
TD
Auto dialing
-
93
-
mS
Intertone Pause
T
ITP
Auto dialing
-
93
-
mS
Flash Break Time
T
FB
F1
-
600
-
F2
-
100
-
mS
F3
300
F4
-
73
-
Flash Pause Time
T
FP
F1, F2, F3, F4
-
1.0
-
S
Pause Time
T
P
R/P1
-
3.6
-
S
R/P2
-
2.0
-
One-key Redial Break
Time
T
RB
-
-
2.2
-
S
One-key Redial Pause
Time
T
RP
-
-
600
-
mS
Notes:
1. Crystal parameters suggested for proper operation are Rs < 100
, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF,
F
OSC
. = 3.579545 MHz
0.02%.
2. Crystal oscillator accuracy directly affects these times.
W91520N SERIES
- 10 -
TIMING WAVEFORMS
T
IDP
HKS
KEY IN
DP
H/P MUTE
T/P MUTE
2
B
M
T
IDP
T
IDP
T
KID
T
IDP
T
PDP
2
M B
4
T
KRD
3
T
KID
DTMF
OSC.
Low
OSCILLATION
OSCILLATION
T
PDP
Figure 1(a) Normal Dialing Timing Diagram
HKS
KEY IN
DP
T/P MUTE
R/P
T
KID
B
M
T
IDP
T
IDP
T
PDP
M B
DTMF
OSC.
Low
OSCILLATION
T
IDP
T
KRD
H/P MUTE
T< T
OHD
Figure 1(b) Pulse Mode Auto Dialing Timing Diagram
W91520N SERIES
Publication Release Date: May 1997
- 11 -
Revision A3
Timing Waveforms, continued
HKS
KEY IN
DP
H/P MUTE
R/P
T
KID
B
M
T
IDP
T
PDP
M B
DTMF
OSC.
Low
OSCILLATION
T
KRD
T = T
OHD
T/P MUTE
Figure 1(c) Pulse Mode Auto Dialing Timing Diagram
HKS
KEY IN
T/P MUTE
DTMF
5
4
3
T
TD
OSC.
DP
OSCILLATION
2
T
ITP
T
ITP
T
KID
High
T
ITP
OSCILLATION
T
KRD
H/P MUTE
Figure 2(a) Tone Mode Normal Dialing Timing Diagram
W91520N SERIES
- 12 -
Timing Waveforms, continued
HKS
KEY IN
T/P MUTE
DTMF
R/P
T
KRD
OSC.
DP
OSCILLATION
T
TD
T
ITP
T
ITP
T
KID
High
H/P MUTE
T < T
OHD
Figure 2(b) Tone Mode Auto Dialing Timing Diagram
HKS
KEY IN
T/P MUTE
DTMF
R/P
T
KRD
OSC.
DP
OSCILLATION
T
TD
T
ITP
T
KID
High
H/P MUTE
T = T
OHD
Figure 2(c) Tone Mode Auto Dialing Timing Diagram
W91520N SERIES
Publication Release Date: May 1997
- 13 -
Revision A3
Timing Waveforms, continued
1
2
HKS
KEY IN
H
MODE
DP
DTMF
H
H
H
H
MUTE
H/P MUTE
HFI
HFO
OSC
T/P
Figure 3. Handfree Function Timing Diagram
W91520N SERIES
- 14 -
Timing Waveforms, continued
HKS
KEY IN
DP
H/P MUTE
DTMF
OSC.
Low
OSCILLATION
R
R
KID
T
B
M
T
PDP
T
IDP
T
RB
T
RP
T
IDP
HFI
HFO
KID
T
M
T
PDP
B
T/P MUTE
Figure 4. One-key Redial Timing Diagram
HKS
KEY IN
DP
T/P MUTE
DTMF
OSC.
Low
OSC
2
T
KID
R/P
3
B
M
T
PDP
M
T
IDP
B
T
PDP
H/P MUTE
T
P
Figure 5. Pause Function Timing Diagram
W91520N SERIES
Publication Release Date: May 1997
- 15 -
Revision A3
Timing Waveforms, continued
HKS
KEY IN
DP
T/P MUTE
DTMF
OSC.
OSCILLATION
2
T
KID
*/T
3
B
M
T
PDP
T
IDP
H/P MUTE
T
P
Figure 6. Pulse-to-tone Timing Diagram
H/P MUTE
T/P MUTE
F
F
HKS
T
KID
DTMF
OSC.
DP
KEY IN
Low
3
T
FB
F
T
KID
T
KID
T
ITP
OSCILLATION
HFI
HFO
T
FB
T
FP
Figure 7. Flash Timing Diagram
W91520N SERIES
- 16 -
Headquarters
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5792697
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-7197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-7190505
FAX: 886-2-7197502
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II,
123 Hoi Bun Rd., Kwun Tong,
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.
2730 Orchard Parkway, San Jose,
CA 95134, U.S.A.
TEL: 1-408-9436666
FAX: 1-408-9436668
Note: All data and specifications are subject to change without notice.