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Электронный компонент: W91540NS

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W91540N SERIES
10-MEMORY TONE/PULSE DIALER WITH SAVE,
KEYTONE, LOCK, AND HANDFREE FUNCTIONS
Publication Release Date: May 1997
- 1 -
Revision A2
GENERAL DESCRIPTION
The W91540N series are tone/pulse switchable telephone dialers with 10 memories, keytone or lock
function, and handfree dialing control. These chips are fabricated using Winbond's high-performance
CMOS technology and thus offer good performance in low-voltage and low-power operations.
FEATURES
DTMF/pulse switchable dialer
Two by 32-digit redial and save memory
Ten by 16 digit two-touch indirect repertory memory
Pulse-to-tone (*/T) keypad for long distance call operation
Cascaded dialing
Uses 5
5 keyboard
Easy operation with redial, flash, pause, and */T keypads
Pause, P
T (pulse-to-tone) can be stored as a digit in memory
0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out
Dialing rate (10 ppS or 20 ppS) selected by bonding option
Minimum tone output duration: 93 mS (W91544AN: 87 mS)
Minimum intertone pause: 93 mS (W91544AN: 87 mS)
Pause time: 3.6 sec
300 mS off-hook delay in lock mode (
DP
remains low for 300 mS while off-hook)
Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S
Make/break ratio (2:3 or 1:2) selectable by Mode pin
Key tone output for valid keypad entry recognition
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 18 or 20-pin DIP
W91540N SERIES
- 2 -
The different dialers in the W91540N series are shown in the following table:
TYPE NO.
REPLACEMENT
TYPE NO.
PULSE
(ppS)
FLASH
(mS)
M/B
KEY
TONE
HANDFREE
DIALING
LOCK
PACKAGE
(PINS)
W91540N
W91540
10
600/300/73/100
Pin
Yes
-
-
18
W91541
W91540AN
W91540A
10
600/300/73/100
Pin
Yes
Yes
-
20
W91541A
W91541LN
W91541L
10
600/300/73/100
Pin
-
-
Yes
18
W91541ALN
W91541AL
10
600/300/73/100
Pin
-
Yes
Yes
20
W91542N
W91542
20
600/300/73/100
Pin
Yes
-
-
18
W91542AN
W91542A
20
600/300/73/100
Pin
Yes
Yes
-
20
W91544AN
New type
10
600/300/73/100
Pin
Yes
Yes
-
20
Note: The W91544AN is designed specifically for use in France. The pause time is not added in pulse-to-tone mode.
PIN CONFIGURATIONS
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
C4
C3
C2
R4
R1
R2
R3
XT
T/P MUTE
MODE
DTMF
XT
HKS
DP/C5
V
DD
V
SS
KT
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
C4
C3
C2
R4
R1
R2
R3
XT
MODE
DTMF
HFO
XT
T/P MUTE
HFI
HKS
DP/C5
V
DD
V
SS
KT
W91540N/542N
W91540AN/542AN/544AN
W91540N SERIES
Publication Release Date: May 1997
- 3 -
Revision A2
Pin Configurations, continued
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
C4
C3
C2
R4
R1
R2
R3
XT
T/P MUTE
MODE
DTMF
XT
HKS
DP/C5
V
SS
LOCK
V
DD
W91541LN
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
C4
C3
C2
R4
R1
R2
R3
XT
MODE
DTMF
HFO
XT
T/P MUTE
HFI
HKS
DP/C5
V
DD
V
SS
LOCK
W91541ALN
PIN DESCRIPTION
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
Column-Row
Inputs
1
-
4
&
15
-
18
1
-
4
&
17
-
20
I
The keyboard input is compatible with a standard
5
5 keyboard, an inexpensive single contact
(Form A) keyboard, and electronic input.
In normal operation, any single button can be
pushed to produce a dual tone, pulses, or a
function. Activation of two or more buttons will
result in no response except for single tone.
XT
7
7
I
A built-in inverter provides oscillation with an
inexpensive 3.579545 MHz crystal. The oscillator
ceases when a keypad input is not sensed. The
crystal frequency deviation is 0.02%.
XT
8
8
O
Crystal oscillator output pin.
T/P
MUTE
9
9
O
The T/P
MUTE
is a conventional CMOS N-
channel open drain output.
The output transistor is switched on low level
during dialing sequence (both pulse and tone
mode). Otherwise, it is switched off.
W91540N SERIES
- 4 -
Pin Description, continued
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
MODE
13
15
I
Pulling mode pin to V
SS
places dialer in tone
mode.
Pulling mode pin to V
DD
places dialer in pulse
mode with M/B ratio of 40:60 (10 ppS, except for
W91542N/542AN is 20 ppS).
Leaving mode pin floating places dialer in pulse
mode with M/B ratio of 33.3:66.7 (10 ppS, except
for W91542N/542AN is 20 ppS).
HKS
10
12
I
The
HKS
(hook switch) input is used to sense
whether the handset is on-hook or off-hook.
On-hook state,
HKS
= 1: chip is in sleeping
mode, no operation.
Off-hook state,
HKS
= 0: chip is enabled for
normal operation.
HKS
pin is pulled to V
DD
by an internal resistor.
KT
5
(except for
W91541LN)
5
(except for
W91541ALN)
O
The key tone output is a conventional CMOS
inverter. The key tone is generated when any
valid key is pressed; the KT pin generates a 1.2
KHz square wave at 35 mS. When no key is
pressed, the KT pin remains in low state.
LOCK
5
(only for
W91541LN)
5
(only for
W91541ALN)
I
The function of this terminal is to prevent "0"
dialing and "9" dialing under PABX system long
distance call control. When the first key input
after reset is 0 or 9, all key inputs, including the 0
or 9 key, become invalid and the chip generates
no output. The telephone is reinitialized by a
reset.
The function of the
LOCK
pin is shown below:
LOCK PIN
FUNCTION
V
DD
V
SS
Floating
"0", "9" dialing inhibited
Normal dialing
"0" dialing inhibited
DP
/
C5
11
13
O
N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either
tone mode or pulse mode.
In lock mode, DP remains low for 300 mS during
off-hook delay time.
The timing diagram for pulse mode is shown in
Figure 1(a, b, c, d).
W91540N SERIES
Publication Release Date: May 1997
- 5 -
Revision A2
Pin Description, continued
SYMBOL
18-PIN
20-PIN
I/O
FUNCTION
DTMF
12
14
O
During pulse dialing, this pin remains in low state
regardless of keypad input. In tone mode, it will output a
dual or single tone.
A detailed timing diagram for tone mode is shown in
Figure 2(a, b, c, d)
R1
R2
R3
R4
C1
C2
C3
Specified
697
770
852
941
1209
1336
1477
699
766
848
948
1216
1332
1472
Actual
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
Error %
OUTPUT FREQUENCY
V
DD
, V
SS
14, 6
16, 6
I
Power input pins for the dialer chip. V
DD
is the main
power and V
SS
is the ground.
HFI
, HFO
-
10, 11
I, O
Handfree control pins. A low pulse on the
HFI
input pin
toggles the handfree control state.
Status of the handfree control is listed in the following
table:
CURRENT STATE
Input
HFO
Dialing
High
Yes
On Hook
High
Low
No
Off Hook
High
Low
Yes
On Hook
Off Hook
Low
Yes
Off Hook
Low
On Hook
Low
No
Off Hook
High
On Hook
High
Yes
Low
Hook SW.
HFO
NEXT STATE
HFI
HFI
HFI
HFI
pin is pulled to V
DD
by an internal resistor.
Detailed timing diagram is shown in Figure 3.
W91540N SERIES
- 6 -
BLOCK DIAGRAM
ROW
COLUMN
DTMF
XT
XT
HKS
MODE
RAM
COUNTER
SYSTEM CLOCK
GENERATOR
LOCATION
LATCH
D/A
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
READ/WRITE
HFI
(R1 to R4, Vx)
(C1 to C4)
T/P MUTE
HFO
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
KEYBOARD
INTERFACE
CONVERTER
LOCK
DP/C5
KT
FUNCTIONAL DESCRIPTION
C1
C2
C3
C4
DP
/
C5
1
2
3
S
R1
4
5
6
F4
R2
7
8
9
A
R3
/T
0
#
R/P
SAVE
R4
F1
F2
F3
Vx
S: Store function key
A: Indirect repertory memory dialing function key
R/P: Redial and pause function key
/T:
in tone mode and P
T in pulse mode
SAVE: Save function key for one-touch 32-digit memory
F1, ..., F4: Flash function keys; F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS, and flash
pause time for each key is 1.0 mS
Note: Ln = 0, ..., 9; Dn = 0, ..., 9, */T, #, Pause.
W91540N SERIES
Publication Release Date: May 1997
- 7 -
Revision A2
Normal Dialing
OFF HOOK
, (or
ON HOOK
& HFI
),
D1
,
D2
, ...,
Dn
1. D1, D2,
...
, Dn will be dialed out.
2. Dialing length is unlimited, but redial is inhibited if length exceeds 32 digits in normal dialing.
Redialing Dialing
OFF HOOK
, (or
ON HOOK
& HFI
),
D1
,
D2
, ...,
Dn
, Busy
Come
ON HOOK
,
OFF HOOK
, (or
ON HOOK
& HFI
),
R/P
1. The redial memory content will be D1, D2, ..., Dn.
2. The
R/P
key can execute the redial function only as the first key-in after off-hook; otherwise,
it will execute pause function.
Number Store
OFF HOOK
, (or
ON HOOK
& HFI
),
D1
,
D2
, ...,
Dn
, S
, S
, Ln
1. If the sequence of the dialed digits D1, D2,
...
, Dn has not
finished,
S
will be ignored.
2. D1, D2, ..., Dn will be dialed out and stored in memory location Ln.
OFF HOOK
, (or
ON HOOK
& HFI
),
S
, D1
, D2
, ...,
Dn
, S
, Ln
3. D1, D2,
...
, Dn will be stored in memory location Ln but will not be dialed out.
4. R/P and */T
keys can be stored as a digit in memory, but
R/P key cannot be the
first digit. In store mode, R/P is the pause function key.
5. The store mode is released after the store function is executed or when the state of the hook
switch changes or the flash function is executed.
Save
OFF
HOOK
, (or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
,
SAVE
1. D1, D2, ..., Dn will be dialed out.
2. If the dialing of
D1
to
Dn
is finished, pressing
SAVE
will cause D1 to Dn to be
duplicated to save memory.
OFF HOOK
, (or
ON HOOK
&
HFI
),
SAVE
3. D1 to Dn will be dialed out after
SAVE
key is pressed.
W91540N SERIES
- 8 -
Repertory Dialing
OFF HOOK
, (or
ON HOOK
&
HFI
),
SAVE
1. The content of save memory location will be dialed out.
OFF HOOK
, (or
ON HOOK
&
HFI
),
A
,
Ln
2. The content of memory location Ln will be dialed out.
Access Pause
OFF HOOK
, (or
ON HOOK
&
HFI
),
D1
,
D2
, R/P
,
D3
, ...,
Dn
1. The pause function can be stored as a digit in memory.
2. The pause function is executed in normal dialing or redialing or memory dialing.
3. The pause function timing diagram is shown in Figure 4.
Pulse-to-tone (*/T)
OFF HOOK
, (or
ON HOOK
&
HFI
),
D1
, D2
, ...,
Dn
, */T
, D1'
, D2'
, ...,
Dn'
1. If the mode switch is set to pulse mode, then the output signal will be as follows:
All versions except W91544AN:
D1, D2, ..., Dn, Pause, D1', D2', ..., Dn'
(Pulse) (Tone)
W91544AN:
D1, D2, ..., Dn, *, D1', D2', ..., Dn'
(Pulse) (Tone) (Tone)
2. If the mode switch is set to tone mode, then the output signal will be as follows:
D1, D2, ..., Dn, *, D1', D2', ..., Dn'
(Tone) (Tone)
3.
The dialer remains in tone mode when the digits have been dialed out and can be reset to pulse
mode only by going on-hook.
4. The function timing diagram is shown in Figure 5(a, b).
Flash
OFF HOOK
, (or
ON HOOK
&
HFI
),
Fn
1. Fn = F1, ..., F4.
2. If
Fn
is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS (F2), 73
mS
(F3), or 100 mS (F4). In each case the flash pause time is 1.0 second.
W91540N SERIES
Publication Release Date: May 1997
- 9 -
Revision A2
3. Flash key cannot be stored as a digit in memory. The flash key has first priority among keyboard
functions.
4. The system will return to the initial state after the flash pause time is finished.
5. The flash function timing diagram is shown in Figure 6.
Cascaded Dialing
1.
Normal Dialing
+
Repertory Dialing
+
Normal Dialing
(1st sequence) (2nd sequence)
2.
Repertory Dialing
+ Normal Dialing
+
Repertory Dialing
(1st sequence) (2nd sequence)
3.
Redialing
+
Normal Dialing
+
Repertory Dialing
(1st sequence) (2nd sequence)
4. Redialing and save dialing are valid only as the first key-in.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
UNIT
DC supply voltage
V
DD
-
V
SS
-0.3 to +7.0
V
V
IL
V
SS
-0.3
V
Input/Output Voltage
V
IH
V
DD
+0.3
V
V
OL
V
SS
-0.3
V
V
OH
V
DD
+0.3
V
Power dissipation
P
D
120
mW
Operating temperature
T
OPR
-20 to +70
C
Storage temperature
T
SIG
-55 to +150
C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
W91540N SERIES
- 10 -
DC CHARACTERISTICS
(V
DD
-
V
SS
= 2.5V, Fosc. = 3.58 MH
Z
, T
A
= 25
C; all outputs unloaded)
PARAMETER
SYM.
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Operating Voltage
V
DD
-
2.0
-
5.5
V
Operating Current
I
OP
Tone
-
0.4
0.6
mA
Pulse
-
0.2
0.4
mA
Standby Current
I
SB
HKS
= 0, No load &
No key entry
-
-
15
A
Memory Retention Current
I
MR
HKS
= 1,
V
DD
= 1.0V
-
-
0.2
A
Tone Output Voltage
V
TO
Row group,
R
L
= 5 K
130
150
170
mVrm
s
Pre-emphasis
Col/Row
V
DD
= 2.0
-
5.5V
1
2
3
dB
DTMF Distortion
THD
R
L
= 5 K
V
DD
= 2.0
-
5.5V
-
-30
-23
dB
DTMF Output DC Level
V
TDC
R
L
= 5 K
V
DD
= 2.0
-
5.5V
1.0
-
3.0
V
DTMF Output Sink Current
I
TL
V
TO
= 0.5V
0.2
-
-
mA
DP
Output Sink Current
I
PL
V
PO
= 0.5V
0.5
-
-
mA
T/P
MUTE
Output Sink
Current
I
ML
V
MO
= 0.5V
0.5
-
-
mA
KT Drive/Sink Current
I
KTH
V
KTH
= 2.0V
0.5
-
-
mA
I
KTL
V
KTL
= 0.5V
0.5
-
-
mA
HFO Drive/Sink Current
I
HFH
V
HFH
= 2.0V
0.5
-
-
mA
I
HFL
V
HFL
= 0.5V
0.5
-
-
mA
Keypad Input Drive
Current
I
KD
V
I
= 0V
4
-
-
A
Keypad Input Sink Current
I
KS
V
I
= 2.5V
200
400
-
A
Keypad Resistance
-
-
5.0
K
W91540N SERIES
Publication Release Date: May 1997
- 11 -
Revision A2
AC CHARACTERISTICS
PARAMETER
SYM.
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Key-in Debounce
T
KID
-
-
20
-
mS
Key Release Debounce
T
KRD
-
-
20
-
mS
On-hook Debounce
T
OHD
Lock Mode
-
20
-
mS
Unlock Mode
-
150
-
mS
Pre-digit Pause
1
T
PDP1
Mode Pin = V
DD
-
40
-
mS
10 ppS
Mode Pin =
Floating
-
33.3
-
mS
Pre-digit Pause
2
T
PDP2
Mode Pin = V
DD
-
20
-
mS
20 ppS
Mode Pin =
Floating
-
16.7
-
mS
Inter-digit Pause
T
IDP
10 ppS
-
800
-
mS
(Auto Dialing)
20 ppS
-
500
-
mS
Make/Break Ratio
M:B
Mode Pin = V
DD
-
40:60
-
%
Mode Pin =
Floating
-
33.3:66.7
-
%
Tone Output Duration
T
TD
Except for
W91544AN
-
93
-
mS
Intertone Pause
T
ITP
Except for
W91544AN
-
93
-
mS
Tone Output Duration
T
TD
W91544AN Only
-
87
-
mS
Intertone Pause
T
ITP
W91544AN Only
-
87
-
mS
F1
-
600
-
Flash Break Time
T
FB
F2
-
300
-
mS
F3
-
73
-
F4
-
100
-
Flash Pause Time
T
FP
-
-
1.0
-
S
Pause Time
T
P
-
-
3.6
-
S
Key Tone Frequency
F
KT
-
-
1.2
-
KHz
Key Tone Duration
T
KTD
-
-
35
-
mS
One-key Redialing Pause
Time
T
RP
-
-
600
-
mS
One-key Redialing Break
Time
T
RB
-
-
2.2
-
S
Off-hook Delay
T
OFD
Lock Only
-
300
-
mS
First Key-in Delay
T
FKD
Lock Only
-
300
-
mS
Notes:
W91540N SERIES
- 12 -
1. Crystal parameters suggested for proper operation are Rs < 100
, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF,
Fosc. = 3.579545 MHz
0.02%.
2. Crystal oscillator accuracy directly affects these times.
TIMING WAVEFORMS
T
IDP
HKS
KEY IN
DP
T/P MUTE
2
B
M
T
IDP
T
IDP
T
KID
T
IDP
T
PDP
2
M B
4
T
KRD
3
< 600mS
< 300mS
T
KID
DTMF
OSC.
KT
Low
OSCILLATION
OSCILLATION
T
PDP
Figure 1(a). Normal Dialing Timing Diagram (Pulse Mode Without Lock Function)
HKS
KEY IN
DP
T/P MUTE
T
OFD
2
B
M
T
IDP
T
IDP
T
PDP
T
KID
T
IDP
T
PDP
2
M B
4
T
KID
T
KRD
DTMF
OSC.
KT
Low
OSCILLATION
OSCILLATION
T
FKD
3
< 600mS
< 300mS
Figure 1(b). Normal Dialing Timing Diagram (Pulse Mode with Lock Function)
W91540N SERIES
Publication Release Date: May 1997
- 13 -
Revision A2
Timing Waveforms, continued
HKS
KEY IN
DP
T/P MUTE
R/P
T
KID
B
M
T
IDP
T
IDP
T
PDP
M B
DTMF
OSC.
KT
Low
OSCILLATION
T
IDP
< 600mS
T
KRD
Figure 1(c). Auto Dialing Timing Diagram (Pulse Mode Without Lock Function)
HKS
KEY IN
DP
T/P MUTE
T
OFD
B
M
T
IDP
T
IDP
T
PDP
M B
DTMF
OSC.
KT
Low
OSCILLATION
R/P
T
KID
T
IDP
T
FKD
< 600mS
300mS
Figure 1(d). Auto Dialing Timing Diagram (Pulse Mode with Lock Function)
W91540N SERIES
- 14 -
Timing Waveforms, continued
HKS
KEY IN
T/P MUTE
DTMF
5
T
KID
2
4
T
KRD
3
< 600 mS
< 300 mS
T
TD
OSC.
KT
DP
OSCILLATION
OSCILLATION
2
T
ITP
T
ITP
T
ITP
T
KID
High
T
ITP
OSCILLATION
T
KRD
Figure 2(a). Normal Dialing Timing Diagram (Tone Mode Without Lock Function)
HKS
KEY IN
T/P MUTE
DTMF
5
T
KID
2
4
T
KRD
3
< 600 mS
< 300 mS
T
TD
OSC.
KT
T
OFD
DP
OSCILLATION
OSCILLATION
T
FKD
2
T
ITP
T
ITP
T
ITP
Figure 2(b). Normal Dialing Timing Diagram (Tone Mode with Lock Function)
W91540N SERIES
Publication Release Date: May 1997
- 15 -
Revision A2
Timing Waveforms, continued
HKS
KEY IN
T/P MUTE
DTMF
R/P
T
KRD
< 600mS
OSC.
KT
DP
OSCILLATION
T
TD
T
ITP
T
ITP
T
KID
High
Figure 2(c). Auto Dialing Timing Diagram (Tone Mode Without Lock Function)
HKS
KEY IN
T/P MUTE
DTMF
R/P
T
KRD
< 600mS
300mS
T
TD
OSC.
KT
T
OFD
DP
OSCILLATION
T
FKD
T
ITP
T
ITP
Figure 2(d) Auto Dialing Timing Diagram (Tone Mode with Lock Function)
W91540N SERIES
- 16 -
Timing Waveforms, continued
T/P MUTE
HFI
HKS
ON HOOK
HFO
High
CHIP ENBLE
Figure 3. Handfree Timing Diagram
HKS
KEY IN
DP
T/P MUTE
DTMF
OSC.
KT
Low
OSCILLATION
< 600mS
2
T
KID
R/P
T
OFD
300mS
3
B
M
T
PDP
M
T
IDP
B
T
PDP
T
FKD
T
P
OSCILLATION
Figure 4. Pause Function Timing Diagram
W91540N SERIES
Publication Release Date: May 1997
- 17 -
Revision A2
Timing Waveforms, continued
HKS
KEY IN
DP
T/P MUTE
DTMF
OSC.
KT
OSCILLATION
< 600mS
2
T
KID
*/T
T
OFD
300mS
3
B
M
T
PDP
T
IDP
T
FKD
T
P
OSCILLATION
T
ITP
Figure 5(a). Pulse-to-tone Timing Diagram (All Versions Except W91544AN)
HKS
KEY IN
DP
T/P MUTE
*/T
B
M
T
IDP
T
PDP
T
KID
2
4
T
KID
T
KRD
DTMF
OSC.
KT
OSCILLATION
OSCILLATION
T
ITP
ITP
T
Figure 5(b). Pulse-to-tone Timing Diagram (W91544AN Only)
W91540N SERIES
- 18 -
Timing Waveforms, continued
KT
T/P MUTE
F
F
HKS
T
KID
DTMF
OSC.
DP
KEY IN
Low
3
T
FB
F
T
KID
T
KID
T
ITP
OSCILLATION
HFI
HFO
T
FB
T
FP
Figure 6. Flash Timing Diagram
W91540N SERIES
Publication Release Date: May 1997
- 19 -
Revision A2
Headquarters
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5792697
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-7197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-7190505
FAX: 886-2-7197502
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II,
123 Hoi Bun Rd., Kwun Tong,
Kowloon, Hong Kong
TEL: 852-27516023
FAX: 852-27552064
Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.
2730 Orchard Parkway, San Jose,
CA 95134, U.S.A.
TEL: 1-408-9436666
FAX: 1-408-9436668
Note: All data and specifications are subject to change without notice.