W91820N SERIES
13-MEMORY TONE/PULSE DIALER WITH
HANDFREE, LOCK AND HOLD FUNCTIONS
Publication Release Date: May 1999
- 1 -
Revision A2
GENERAL DESCRIPTION
The W91820N is a series of tone/pulse switchable telephone dialers with 13 memory, keytone, hold,
lock, and handfree dialing control features. These chips are fabricated using Winbond's high-
performance CMOS technology and thus offer good performance in low-voltage, low-power
operations.
FEATURES
Tone/pulse switchable dialer
Two by 32 digits redial and save memory
Three by 32 digits one-touch direct repertory memory
Ten by 32 digits two-touch indirect repertory memory
Pulse-to-tone (*/T) keypad for long distance call operation
Chain dialing
Uses 5
5 keyboard
Easy operation with redial, flash, pause, and */T keypads
Pause, P
T (pulse-to-tone) can be stored as a digit in memory
Dialing rate:10 ppS or 20 ppS by mask option
Minimum tone output duration: 93 mS (unless W91824N/AN is 87 mS)
Minimum intertone pause: 93 mS (unless W91824N/AN is 87mS)
Pause time: 3.6 sec. (unless W91824N/AN is 2.0 sec.)
Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S
Make/break ratio (2:3 or 1:2) selectable by MODE pin
Mute key for speech network mute
No key will be accepted except the "HOLD" key when in the Hold mode
Key tone output for valid keypad entry recognition
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
20, or 22-pin dual-in-line plastic package
The different dialers in the W91820N series are shown in the following table:
TYPE NO.
PULSE (ppS) LOCK KEY TONE HANDFREE DIALING
PACKAGE (PINS)
W91820N/824N
10
-
-
20
W91820AN/824AN
10
-
22
W91820LN
10
-
-
20
W91820ALN
10
-
22
W91822N
20
-
-
20
W91822AN
20
-
22
Note: W91824N/824AN for French only.
W91820N SERIES
- 2 -
PIN CONFIGURATIONS
H/P MUTE
W91820LN
1
18
R4
C1
C2
C3
C4
SS
V
2
3
4
5
6
13
14
15
16
17
R1
R2
R3
MODE
DD
V
7
8
9
10
11
12
DTMF
HKS
XT
T/P MUTE
DP
XT
LOCK
19
20
N.C.
W91820ALN
1
18
R4
C1
C2
C3
C4
SS
V
2
3
4
5
6
13
14
15
16
17
R1
R2
R3
MODE
DD
V
7
8
9
10
11
12
DTMF
HKS
XT
T/P MUTE
DP
XT
LOCK
19
20
H/P MUTE
21
22
HFI
HFO
N.C.
W91820N/822N
/824N
1
18
R4
C1
C2
C3
C4
SS
V
2
3
4
5
6
13
14
15
16
17
R1
R2
R3
MODE
DD
V
7
8
9
10
11
12
DTMF
HKS
XT
T/P MUTE
DP
XT
KT
19
20
H/P MUTE
N.C.
W91820AN/822AN
/824AN
1
18
R4
C1
C2
C3
C4
SS
V
2
3
4
5
6
13
14
15
16
17
R1
R2
R3
MODE
DD
V
7
8
9
10
11
12
DTMF
HKS
XT
T/P MUTE
DP
XT
KT
19
20
H/P MUTE
21
22
HFI
HFO
N.C.
W91820N SERIES
Publication Release Date: May 1999
- 3 -
Revision A2
PIN DESCRIPTION
SYMBOL
20-PIN 22-PIN I/O
FUNCTION
Column-
Row
Inputs
1
-
4
&
17
-
20
1
-
4
&
19
-
22
I
The keyboard input is compatible with a standard 5
5
keyboard, an inexpensive single contact (Form A) keyboard,
and electronic input.
In normal operation, any single button can be pushed to
produce dual tone, pulses, or functions. Activation of two or
more buttons will result in no response except for a single
tone.
XT
8
8
I
A built-in inverter together with an inexpensive 3.579545 MHz
crystal supplies the oscillator. The oscillator stops when there
is no keypad input. The crystal frequency deviation is 0.02%.
XT
9
9
O
Crystal oscillator output pin.
T/P
MUTE
10
10
O
The T/P MUTE is a conventional CMOS N-channel open
drain output.
The output transistor turns on with a low level during a dialing
sequence (both pulse and tone mode). Otherwise, it is off.
N.C.
16
18
-
No connect
MODE
14
16
I
Connecting the mode pin to V
SS
places the dialer in tone
mode.
Connecting the mode pin to V
DD
places the dialer in pulse
mode with an M/B ratio of 40:60.
Leaving the mode pin floating places the dialer in pulse mode
with an M/B ratio of 33.3:66.7.
HKS
11
13
I
The HKS (hook switch) input is used to sense whether the
handset is on-hook or off-hook.
In on-hook state, HKS = 1: chip is in sleeping mode, no
operation.
In off-hook state, HKS = 0: chip is enabled for normal
operation.
HKS pin is pulled to V
DD
by internal resistor.
KT
(W91820N/8
20AN/822N/
824N/822AN
/824AN only)
5
5
O
The key tone output is a conventional CMOS inverter. The
key tone is generated when any valid key is pressed; the KT
pin generates a 1.2 KHz square wave at 35 mS. When no key
is pressed, the KT pin remains in low state.
W91820N SERIES
- 4 -
Pin Description, continued
SYMBOL
20-PIN 22-PIN I/O
FUNCTION
LOCK
(W91820LN/
820ALN only)
5
5
I
The function of this terminal is to prevent "0" dialing and "9"
dialing under PABX system long distance call control. When
the first key input after reset is 0 or 9, all key inputs,
including the 0 or 9 key, become invalid and the chip
generates no output. The telephone is reinitialized by a
reset.
The function of the LOCK pin is shown below:
LOCK PIN
FUNCTION
V
DD
V
SS
Floating
"0", "9" dialing inhibited
Normal dialing Mode
"0" dialing inhibited
H/P MUTE
6
6
I
The H/P MUTE is a conventional inverter output. During
pulse dialing, flash break or hold period, this output is active
high; otherwise, it remains in low state.
DP
12
14
O
N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either tone mode or
pulse mode.
In lock mode, the DP remains low for 300 mS durint off-
hook delay time.
The timing diagram for pulse mode is shown in Figure 1(a,
b).
DTMF
13
15
O
During pulse dialing, this pin remains in a low state
regardless of the keypad input. In tone mode, it will output a
dual or single tone.
A detailed timing diagram for tone mode is shown in Figure
2(a, b).
R1
R2
R3
R4
C1
C2
C3
Specified
697
770
852
941
1209
1336
1477
699
766
848
948
1216
1332
1472
Actual
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
Error %
OUTPUT FREQUENCY
V
DD
, V
SS
15, 7
17, 7
I
Power input pins for the dialer chip. V
DD
is the power and
V
SS
is the ground.
W91820N SERIES
Publication Release Date: May 1999
- 5 -
Revision A2
Pin Description, continued
SYMBOL
20-PIN 22-PIN I/O
FUNCTION
HFI, HFO
-
11, 12
I, O Handfree control pins.
A low pulse on the HFI input pin toggles the handfree
control state. The status of the handfree control state is
listed in the following table:
HOOK SW.
-
On Hook
Off Hook
On Hook
Off Hook
Off Hook
CURRENT STATE
NEXT STATE
HFO
Low
High
High
-
Low
High
INPUT
HFI
HFI
HFI
Off Hook
On Hook
On Hook
HFO
High
Low
Low
Low
Low
High
DIALING
Yes
No
Yes
Yes
No
Yes
The HFI pin is pulled to V
DD
by an internal resistor.
A detailed timing diagram is shown in Figure 3.
BLOCK DIAGRAM
DTMF
XT
XT
HKS
MODE
RAM
COUNTER
SYSTEM CLOCK
GENERATOR
LOCATION
LATCH
D/A
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
READ/WRITE
HFI
ROW
(R1 ~ R4, Vx/R5)
COLUMN
(C1 ~ C4, Vss)
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
KEYBOARD
INTERFACE
CONVERTER
LOCK
T/P MUTE
HFO
DP
KT
H/P MUTE
W91820N SERIES
- 6 -
FUNCTIONAL DESCRIPTION
Keyboard Operation
C1
C2
C3
C4
V
SS
1
2
3
S
EM1
R1
4
5
6
F4
EM2
R2
7
8
9
A
EM3
R3
*/
T
0
#
R/P
SAVE
R4
F1
F2
F3
H
Vx/R5
S: Store function key
A: Indirect repertory memory dialing function key
H: Hold function key
R/P: Redial and pause function key
*/T: * in tone mode and P
T key in pulse mode
SAVE: Save function key for one-touch 32-digit memory
EM1, ..., EM3: Emergency one-touch memory key
F1, ..., F4: Flash function keys: F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS; all flash
pause time is 1.0 mS
Note: D1, ..., Dn, D1`, ..., Dn`,
*
/T, #, Mn: EM1, ..., EM3, Ln: 0
-
9
Normal Dialing
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
,
...
,
Dn
1. D1, D2,
...
, Dn will be dialed out.
2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing.
Redialing Dialing
OFF HOOK
(or
ON HOOK
&
HFI
,
D1
,
D2
,
...
,
Dn
, BUSY
Come
ON HOOK
,
OFF HOOK
(or
ON HOOK
&
HFI
),
R/P
The
R/P key can execute redial function only as first key-in after off-hook. Otherwise, it will invoke
the pause function.
The below cases are selected by mask option for W91824N/AN (French version) only.
In tone mode:
D1, D2, D3,*(or #), D4, D5, D6
The chip will only output D1, D2, D3 and ignore *(or #), D4, D5, D6.
In pulse mode:
D1, D2, D3, */T, D4, D5, D6
W91820N SERIES
Publication Release Date: May 1999
- 7 -
Revision A2
The chip will only output D1,D2,D3 and do not transfer to tone mode. In pulse mode, the # sign
does not effect.
Number Store
1.
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
,
S
,
S
,
EMn
(or
A
,
Ln
or
SAVE
)
a. The dialing out of
D1
to
Dn
must first be finished before the
S
key is pressed.
b. D1, D2,
...
, Dn will be stored in memory location Mn or saved and then dialed out.
2.
OFF HOOK
(or
ON HOOK
&
HFI
),
S
,
D1
,
D2
, ...,
Dn
,
S
,
EMn
(or
A
,
Ln
or
SAVE
)
a. D1, D2,
...
, Dn will be stored in memory location, Mn (or saved), but will not be dialed out.
b.
R/P
and
*/T
keys can be stored as a digit in memory, but the
R/P key cannot be the
first digit. In store mode,
R/P
is the pause function key.
c. The store mode is released after the store function is executed or when the state of the hook
switch changes or the flash function is executed.
Save
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
,
Save
a. D1, D2, ..., Dn will be dialed out.
b. If the dialing of
D1
to
Dn
is finished, pressing
SAVE
will duplicate D1 to Dn to the save
memory.
OFF HOOK
(or
ON HOOK
&
HFI
),
come on
OFF HOOK
(or
ON HOOK
&
HFI
),
SAVE
c. D1 to Dn will be dialed out after the
SAVE
key is pressed.
Repertory Dialing Procedure
One-touch direct repertory dialing:
OFF HOOK
(or
ON HOOK
&
HFI
),
Mn
(or
SAVE
)
W91820N SERIES
- 8 -
Two-touch direct repertory dialing:
OFF HOOK
(or
ON HOOK
&
HFI
),
A
,
Ln
Access Pause
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
,
R/P
,
D3
, ...,
Dn
1. The pause function can be stored in memory.
2. The pause function is executed with normal dialing, redialing or memory dialing.
3. The pause function timing diagram is shown in Figure 6.
Pulse-to-tone (*/T)
OFF HOOK
(or
ON HOOK
&
HFI
),
D1
,
D2
, ...,
Dn
,
*/T
,
D1'
,
,
D2'
, ...,
Dn'
1. If the mode switch is set in pulse mode, then it will perform
case a: D1, D2, ---, Dn, Pause (3.6 sec), D1', D2', ---, Dn'
(Pulse)
(Tone)
case b: (only for French version)
D1, D2, ---, Dn, * , D1', D2', ---, Dn'
(Pulse) (Tone)
2. If the mode switch is set in tone mode, then the output signal will be:
D1, D2, ---, Dn, * , D1', D2', ---, Dn'
(Tone)
3. It can be reset to pulse mode only if ON HOOK is active. This is because it remains in tone mode
when the digits have been dialed out.
4. The function timing diagram is shown in Figure 7.
Flash
OFF HOOK
(or
ON HOOK
&
HFI
),
Fn
1. Fn = F1
-
F4. If
Fn
is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS
(F2), 73 mS (F3) or 100 mS (F4) and a pause time of 1.0 second, after which the next digit is dialed
out.
2. The flash key has the first priority of the keyboard function only one flash key will be released to
the user.
3. When the flash key is key in, the system will return to the initial state after the flash pause time is
finished.
4. The flash function timing diagram is shown in Figure 8.
W91820N SERIES
Publication Release Date: May 1999
- 9 -
Revision A2
Cascaded Dialing
OFF HOOK
(or
ON HOOK
&
HFI
)
1.
Normal Dialing
+
Repertory Dialing
+
Normal Dialing
(1st sequence)
(2nd sequence)
2.
Repertory Dialing
+
Normal Dialing
+
Repertory Dialing
(1st sequence)
(2nd sequence)
3.
Redialing
+
Normal Dialing
+
Repertory Dialing
(1st sequence) (2nd sequence)
Redialing is valid only for the first key-in.
The second sequence should not be operated until the first sequence is dialed out completely.
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATING
UNIT
DC Supply Voltage
V
DD
-
V
SS
-0.3 to +7.0
V
V
IL
V
SS
-0.3
V
Input/Output Voltage
V
IH
V
DD
+0.3
V
V
OL
V
SS
-0.3
V
V
OH
V
DD
+0.3
V
Power Dissipation
P
D
120
mW
Operation Temperature
T
OPR
-20 to +70
C
Storage Temperature
T
STG
-55 to +150
C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
W91820N SERIES
- 10 -
DC CHARACTERISTICS
(V
DD
-
V
SS
= 2.5V, Fosc. = 3.58 MHz, T
A
= 25
C, all outputs unloaded)
PARAMETER
SYM.
CONDITIONS
MIN. TYP. MAX.
UNIT
Operating Voltage
V
DD
-
2.0
-
5.5
V
Operating Current
I
OP
Tone
-
0.4
0.6
mA
Pulse
-
0.2
0.4
mA
Standby Current
I
SB
HKS = 0, No load &
No key entry
-
-
15
A
Memory Retention Current
I
MR
HKS = 1, V
DD
= 1.0V
-
-
1
A
Tone Output Voltage
V
TO
Row group, R
L
= 5 K
130
150
170
mVrms
Pre-emphasis
Col/Row, V
DD
= 2.0
-
5.5V
1
2
3
dB
DTMF Distortion
THD
R
L
= 5 K
, V
DD
= 2.0
-
5.5V
-
-30
-23
dB
DTMF Output DC Level
V
TDC
R
L
= 5 K
, V
DD
= 2.0
-
5.5V
1.0
-
3.0
V
DTMF Output Sink Current
I
TL
V
TO
= 0.5V
0.2
-
-
mA
DP
Output Sink Current
I
PL
V
PO
= 0.5V
0.5
-
-
mA
T/P MUTE Output Sink
Current
I
ML
V
MO
= 0.5V
0.5
-
-
mA
KT Drive/Sink Current
I
KTH
V
KTH
= 2.0V
0.5
-
-
mA
I
KTL
V
KTL
= 0.5V
0.5
-
-
mA
HFO Drive/Sink Current
I
HFH
V
HFH
= 2.0V
0.5
-
-
mA
I
HFL
V
HFL
= 0.5V
0.5
-
-
mA
H/P MUTE
I
HPH
V
HPH
= 2.0V
0.5
-
-
mA
Drive/Sink Current
I
HPL
V
HPL
= 0.5V
0.5
-
-
mA
Keypad Input Drive Current
I
KD
V
I
= 0V
4
-
-
A
HKS Pull High Resister
RHKS
300
500
-
K
Keypad Input Sink Current
I
KS
V
I
= 2.5V
200
400
-
A
Keypad Resistance
-
-
5.0
K
W91820N SERIES
Publication Release Date: May 1999
- 11 -
Revision A2
AC CHARACTERISTICS
PARAMETER
SYM.
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Key-in Debounce
T
KID
-
-
20
-
mS
Key Release Debounce
T
KRD
-
-
20
-
mS
On-hook Debounce
T
OHD
Lock Mode
-
20
-
mS
Unlock Mode
-
150
-
mS
Pre-digit Pause1
T
PDP1
Mode Pin = V
DD
-
40
-
mS
10 ppS
Mode Pin = Floating
-
33.3
-
mS
Pre-digit Pause2
T
PDP2
Mode Pin = V
DD
-
20
-
mS
20 ppS
Mode Pin = Floating
-
16.7
-
mS
Inter Digit Pause
(Auto Dialing)
T
IDP
10 ppS
(W91820N/W91820AN/820LN
/820ALN/824N/824AN only
)
-
800
-
mS
20 ppS
(W91822N/822AN only)
-
500
-
mS
Interdigit Pause
T
IDP
10 ppS
-
800
-
mS
(Auto dialing)
20 ppS
-
500
-
mS
Make/Break Ratio
M:B
Mode Pin = V
DD
-
40:60
-
%
Mode Pin = Floating
-
33.3:66.7
-
%
Tone Output Duration
T
TD
-
-
93
-
mS
Intertone Pause
T
ITP
-
-
93
-
mS
Flash Break Time
T
FB
F1
-
600
-
mS
F2
-
300
-
F3
-
73
-
F4
-
100
-
Flash Pause Time
T
FP
-
-
1.0
-
S
Pause Time
T
P
-
-
3.6
-
S
(W91824N/AN only)
-
2.0
-
S
Key Tone Frequency
F
KT
-
-
1.2
-
KHz
Key Tone Duration
T
KTD
-
-
35
-
mS
One-key Redialing
Pause Time
T
RP
-
-
600
-
mS
One-key Redialing
Break Time
T
RB
-
-
2.2
-
S
First Key-in Delay
T
FKD
Lock only
-
300
-
mS
Notes:
1. Crystal parameters suggested for proper operation are Rs < 100
, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF,
Fosc. = 3.579545 MHz
0.02%.
2. Crystal oscillator accuracy directly affects these times.
W91820N SERIES
- 12 -
TIMING WAVEFORMS
4
2
T
KID
B
M
T
IDP
T
IDP
T
PDP
T
KID
T
IDP
T
PDP
2
HKS
KEY IN
DP
T/P MUTE
M
B
LOW
OSC.
OSC.
H/P MUTE
DTMF
OSC.
KT
Figure 1(a). Pulse Mode Tming Diagram (Normal dialing without lock function)
4
2
T
IDP
T
KID
T
IDP
T
PDP
2
KEY IN
M B
H/P MUTE
OSC.
OSC.
LOW
DTMF
OSC.
(long mute)
300 mS
T
FKD
HKS
DP
T/P MUTE
M B
IDP
T
Figure 1(b). Pulse Mode Timing Diagram (Normal dialing with lock function)
W91820N SERIES
Publication Release Date: May 1999
- 13 -
Revision A2
Timing Waveforms, continued
R/P
B
M
T
IDP
T
IDP
T
PDP
T
IDP
T
PDP
LOW
OSC.
H/P MUTE
DTMF
OSC.
ON HOOK
KT
M B
KEY IN
DP
T/P MUTE
HKS
(long mute)
Figure 1(c). Pulse Mode Timing Diagram (Auto dialing without lock)
R/P
T
IDP
T
IDP
T
PDP
H/P MUTE
LOW
OSC.
DTMF
OSC.
M
B
300 mS
T
FKD
HKS
KEY IN
DP
T/P MUTE
(long mute)
Figure 1(d).Pulse Mode Timing Diagram (Auto dialing with lock function)
W91820N SERIES
- 14 -
Timing Waveforms, continued
T
KID
T
TD
HIGH
OSC.
OSC.
DTMF
OSC.
KT
T
ITP
T
KRD
T
ITP
T
KRD
T
KID
T
ITP
T
KRD
LOW
3
2
6
5
H/P MUTE
DTMF
HKS
KEY IN
T/P MUTE
Figure 2(a). Tone Mode Timing Diagram
HIGH
OSC.
OSC.
DP
T
ITP
T
KRD
T
ITP
T
KRD
T
KID
T
ITP
T
KRD
LOW
3
2
6
5
T
TD
300 mS
T
FKD
DTMF
OSC.
H/P MUTE
HKS
KEY IN
T/P MUTE
Figure 2(b). Tone Mode Timing Diagram (Normal dialing with lock function)
W91820N SERIES
Publication Release Date: May 1999
- 15 -
Revision A2
Timing Waveforms, continued
T
TD
HIGH
OSC.
T
ITP
LOW
R/P
ON HOOK
T
KID
T
ITP
T
T < T
OHD
DP
DTMF
OSC.
KT
H/P MUTE
HKS
KEY IN
T/P MUTE
Figure 2(c). Tone Mode Timing Diagram (Auto dialing without lock function)
T
TD
HIGH
OSC.
ITP
LOW
R/P
T
ITP
T
T < T
OHD
300 mS
T
T
FKD
DP
DTMF
OSC.
H/P MUTE
HKS
KEY IN
T/P MUTE
T
KID
Figure 2(d). Tone Mode Timing Diagram (Auto dialing with lock function)
W91820N SERIES
- 16 -
Timing Waveforms, continued
T
TD
HIGH
OSC.
T
ITP
LOW
R/P
ON HOOK
T
KID
T
T > T
OHD
(return to initial state)
DP
DTMF
OSC.
KT
H/P MUTE
HKS
KEY IN
T/P MUTE
Figure 2(c). Tone Mode Timing Diagram with On-hook Debounce (Auto dialing)
HIGH
CHIP ENABLE
T/P MUTE
H/P MUTE
LOW
HKS
H KEY
OFF HOOK
ON HOOK
Note: The H KEY can not be enabled during chip dissable.
HFI
HFO
Figure 3(a)
W91820N SERIES
Publication Release Date: May 1999
- 17 -
Revision A2
Timing Waveforms, continued
HIGH
OFF HOOK
CHIP ENABLE
T/P MUTE
H/P MUTE
HKS
H KEY
HFI
HFO
Figure 3(b)
Note: The H KEY and HFI inputs will toggle the HFO signal. The first time HFI or H KEY are activated, the HFO signal will go
high and the previous active input will be neglected.
HIGH
ON HOOK
CHIP ENABLE
T/P MUTE
H/P MUTE
HKS
H KEY
HFI
HFO
Figure 3(c)
Note: The HKS signal change of state from high to low will initialize both the HFO and H/P MUTE signals.
W91820N SERIES
- 18 -
Timing Waveforms, continued
4
B
M
T
IDP
T
PDP
DP
T
FKD
T
KID
T
T<T
T
OFD
LOW
OSC.
CHIP ENABLE
DTMF
OSC.
ON HOOK
OSC.
T
OHD
H/P MUTE
HKS
KEY IN
T/P MUTE
OHD
Figure 4. Lock Function Timing Diagram
OKR
T
RP
T
IDP
T
KID
T
IDP
T
PDP
LOW
OSC
.
HKS
KEY IN
DP
T/P MUTE
H/P MUTE
DTMF
OSC.
KT
M
B
LOW
T
RB
T
PDP
Figure 5. Pulse Mode One-key Redialing Timing Diagram
W91820N SERIES
Publication Release Date: May 1999
- 19 -
Revision A2
Timing Waveforms, continued
4
2
T
KID
B
M
T
IDP
T
IDP
T
PDP
T
IDP
T
PDP
LOW
OSC
.
HKS
KEY IN
DP
T/P MUTE
H/P MUTE
DTMF
OSC.
M B
KT
R/P
2
T
P
Figure 6. Pause Function Timing Diagram
4
2
T
KID
B
M
T
IDP
T
IDP
T
PDP
OSC.
HKS
KEY IN
DP
T/P MUTE
H/P MUTE
DTMF
OSC.
M B
KT
*/T
8
T
P
T
ITP
Figure 7(a). Pulse to Tone Function Timing Diagram
W91820N SERIES
- 20 -
Timing Waveforms, continued
HKS
H/P MUTE
DTMF
OSC.
OSCILLATION
T/P MUTE
4
2
T
KID
B
M
T
IDP
T
IDP
T
KEY IN
DP
M
B
*/T
8
PDP
T
ITP
ITP
T
*
8
KT
Figure 7(b). Pulse to tone function timing diagram (only for French version)
R/P
B
M
T
IDP
T
IDP
T
PDP
LOW
OSC
.
HKS
KEY IN
DP
T/P MUTE
H/P MUTE
DTMF
OSC.
ON HOOK
KT
M
B
Figure 7(c). Pulse mode auto-redialing timing diagram continue Figure 6(b). (only for French version)
W91820N SERIES
Publication Release Date: May 1999
- 21 -
Revision A2
Timing Waveforms, continued
T
TD
HIGH
OSC
.
DP
T/P MUTE
H/ P MUTE
DTMF
OSC.
KT
T
ITP
LOW
R/P
HKS
KEY IN
ON HOOK
T
KID
4
2
Figure 7(d). Tone mode auto-redialing timing diagram continue Figure 6(b). (only for French version)
Fn
T
KID
OSC.
HKS
KEY IN
DP
T/P MUTE
H/P MUTE
DTMF
OSC.
KT
T
FB
LOW
LOW
T
FP
Figure 8. Flash Operation Timing Diagram
W91820N SERIES
- 22 -
Headquarters
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5792766
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-27197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-27190505
FAX: 886-2-27197502
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II,
123 Hoi Bun Rd., Kwun Tong,
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.
2727 N. First Street, San Jose,
CA 95134, U.S.A.
TEL: 408-9436666
FAX: 408-5441798
Note: All data and specifications are subject to change without notice.
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