WM2639
12-Bit Parallel Input Voltage Output DAC
with Internal Reference
Production Data,
July
1999, Rev 1.0
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: sales@wolfson.co.uk
http://www.wolfson.co.uk
Production Data contain final specifications
current on publication date. Supply of products
conforms to Wolfson Microelectronics' Terms
and conditions..
Master 15/07/99 15:02
1999 Wolfson Microelectronics Ltd
.
FEATURES
12-bit voltage output DAC
Single supply 2.7V to 5.5V operation
DNL
0.3 LSBs, INL
1.2 LSBs
Internal programmable voltage reference
Settling time 1
s typical
12-bit microprocessor compatible interface
Power down mode 10nA
APPLICATIONS
Battery powered test instruments
Digital offset and gain adjustment
Battery operated/remote industrial controls
Machine and motion control devices
Wireless telephone and communication systems
Speech synthesis
Arbitrary waveform generation
Mass storage devices
ORDERING INFORMATION
DEVICE
TEMP. RANGE
PACKAGE
WM2639CDT
0
to 70
C
20-pin TSSOP
WM2639IDT
-40
to 85
C
20-pin TSSOP
DESCRIPTION
The WM2639 is a 12-bit voltage output, resistor string, digital-to-
analogue converter. A hardware controlled power down mode is
provided that reduces current consumption to 10nA. The device
has been designed to interface efficiently to industry standard
microprocessors and DSPs.
The WM2639 features an internal programmable voltage reference
simplifying overall system design. The reference voltage can also
be supplied externally.
Excellent performance is delivered with a typical DNL of 0.3 LSBs
and typical INL of 1.2 LSBs. The output stage is buffered by a x2
gain near rail-to-rail amplifier, which features a Class A output
stage (slow mode, Class AB). The 12 data bits are double buffered
enabling the output to be asynchronously updated under hardware
control. The settling time of the DAC is software programmable to
allow the designer to optimise speed versus power dissipation.
The device is available in a 20-pin TSSOP package. Commercial
temperature (0 to 70C) and Industrial temperature (-40 to 85C)
variants are supported.
BLOCK DIAGRAM
TYPICAL PERFORMANCE
(13) OUT
data
REF(12)
POWER-ON
RESET
D[0-11]
(19,20, 1-10)
NWE (17)
(14)
GND
POWERDOWN
CONTROL
REFERENCE
INPUT
BUFFER
WM2639
X1
X2
DAC
OUTPUT
BUFFER
NCS (18)
12-BIT
DAC
LATCH
12-BIT
INPUT
REGISTER
2-BIT
REFERENCE
SELECT
LATCH
1.024V/2.048V
SELECTABLE
REFERENCE
X1
REFERENCE
OUTPUT BUFFER
WITH OUPUT
ENABLE
VDD
(11)
(16)
NLDAC
2-BIT
CONTROL
LATCH
REG (15)
5V = VDD, V
REF
-1
-0.8
-0.4
-0.2
0.2
0.4
0.8
1
512
1024
2048
2559
3583
4095
DNL - LSB
WM2639
Production Data
WOLFSON MICROELECTRONICS LTD
Production Data Rev 1.0 July 1999
2
PIN CONFIGURATION
NCS
9
10
D10
D11
12
11
REF
VDD
20
13
14
15
16
17
18
19
D1
AGND
REG
NLDAC
NWE
D0
OUT
8
1
2
3
4
5
6
7
D9
D3
D4
D5
D6
D7
D8
D2
PIN DESCRIPTION
PIN NO
NAME
TYPE
DESCRIPTION
1
D2
Digital input
Data input.
2
D3
Digital input
Data input.
3
D4
Digital input
Data input.
4
D5
Digital input
Data input.
5
D6
Digital input
Data input.
6
D7
Digital input
Data input.
7
D8
Digital input
Data input.
8
D9
Digital input
Data input.
9
D10
Digital input
Data input.
10
D11
Digital input
Data input.(MSB)
11
VDD
Supply
Positive power supply.
12
REF
Analogue I/O
Analogue reference voltage input/output.
13
OUT
Analogue output
DAC analogue voltage output.
14
AGND
Supply
Analogue Ground.
15
REG
Digital input
Register select. Digital input used to access control register.
16
NLDAC
Digital input
Load DAC. Digital input active low. NLDAC must be taken low to update
the DAC latch from the holding latches.
17
NWE
Digital input
Write enable. Digital input active low.
18
NCS
Digital input
Chip select. Digital input active low.
19
D0
Digital input
Data input. (LSB)
20
D1
Digital input
Data input.
Production Data
WM2639
WOLFSON MICROELECTRONICS LTD
Production Data Rev 1.0 July 1999
3
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
CONDITION
MIN
MAX
Digital supply voltages, VDD to GND
7V
Reference input voltage
-0.3V
VDD + 0.3V
Digital input voltage range to GND
-0.3V
VDD + 0.3V
Operating temperature range, T
A
WM2639CDT
WM2639IDT
0
C
-40
C
70
C
85
C
Storage temperature
-65
C
150
C
Lead temperature 1.6mm (1/16 inch) soldering for 10 seconds
260
C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Supply voltage
VDD
2.7
5.5
V
High-level digital input voltage
V
IH
VDD = 2.7V to 5.5V
2
V
Low-level digital input voltage
V
IL
VDD = 2.7V to 5.5V
0.8
V
Reference voltage to REF
V
REF
See Note
VDD - 1.5
V
Load resistance
R
L
2
k
Load capacitance
C
L
100
pF
WM2639CDT
0
70
C
Operating free-air temperature
T
A
WM2639IDT
-40
85
C
Note: Reference voltages greater than VDD/2 will cause output saturation for large DAC codes.
WM2639
Production Data
WOLFSON MICROELECTRONICS LTD
Production Data Rev 1.0 July 1999
4
ELECTRICAL CHARACTERISTICS
Test Conditions:
R
L
= 10k
, C
L
= 100pF. VDD
= 5V
10%, V
REF
= 2.048V and VDD
= 3V
10%, V
REF
= 1.024V over recommended operating free-air
temperature range (unless noted otherwise)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Static DAC Specifications
Resolution
12
bits
Integral non-linearity
INL
See Note 1
1.2
3
LSB
Differential non-linearity
DNL
See Note 2
0.3
0.5
LSB
Zero code error
ZCE
See Note 3
3
20
mV
Gain error
GE
See Note 4
0.3
% FSR
d.c. power supply rejection ratio
DC PSRR
See Note 5
0.5
mV/V
Zero code error temperature coefficient
See Note 6
20
ppm/
C
Gain error temperature coefficient
See Note 6
20
ppm/
C
DAC Output Specifications
Output voltage range
0
VDD - 0.4
V
Output load regulation
2k
to 10k
load
See Note 7
0.1
0.3
%
Power Supplies
Active supply current
I
DD
No load, V
IH
= VDD, V
IL
= 0V
VDD = 5V, V
REF
= 2.048V,
Internal
Slow
Fast
VDD = 5V, V
REF
= 2.048V,
External
Slow
Fast
VDD = 3V, V
REF
= 1.024V,
Internal
Slow
Fast
VDD = 3V, V
REF
= 1.024V,
External
Slow
Fast
See Note 8
1.3
2.3
0.9
1.9
1.2
2.1
0.9
1.8
1.6
2.8
1.2
2.4
1.5
2.6
1.1
2.3
mA
mA
mA
mA
mA
mA
mA
mA
Power down supply current
No load,
all inputs 0V or VDD
See Note 9
0.01
1
A
Dynamic DAC Specifications
Slew rate
DAC code 32-4095,
10%-90%
Slow
Fast
See Note 10
1.2
6.0
1.7
10
V/
s
V/
s
Settling time
DAC code 32-4095
Slow
Fast
See Note 11
3.5
1
s
s
Glitch energy
Code 2047 to 2048
5
nV-s
Production Data
WM2639
WOLFSON MICROELECTRONICS LTD
Production Data Rev 1.0 July 1999
5
Test Conditions:
R
L
= 10k
, C
L
= 100pF. VDD
= 5V
10%, V
REF
= 2.048V and VDD
= 3V
10%, V
REF
= 1.024V over recommended operating free-air
temperature range (unless noted otherwise)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Signal to noise ratio
SNR
fs = 480ksps, f
OUT
= 1kHz,
BW = 20kHz, T
A
=25
C
See Note 12
73
78
dB
Signal to noise and distortion ratio
SNRD
fs = 480ksps, f
OUT
= 1kHz, BW
= 20kHz, T
A
=25
C
See Note 12
61
67
dB
Total harmonic distortion
THD
fs
= 480ksps, f
OUT
= 1kHz, BW
= 20kHz, T
A
=25
C
See Note 12
-69
-62
dB
Spurious free dynamic range
SPFDR
fs
= 480ksps, f
OUT
= 1kHz, BW
= 20kHz, T
A
= 25
C
See Note 12
63
74
dB
Reference configured as input
Reference input resistance
R
REFIN
10
M
Reference input capacitance
C
REFIN
55
pF
Reference feedthrough
V
REF
= 1V
PP
at 1kHz
+ 1.024Vdc, DAC code 0
-60
dB
Reference input bandwidth
V
REF
= 0.2V
PP
+ 1.024V d.c.
DAC code 2048
Slow
Fast
500
900
kHz
kHz
Reference configured as output
Low reference voltage
V
REFOUTL
1.003
1.024
1.045
V
High reference voltage
V
REFOUTH
VDD > 4.75V
2.027
2.048
2.069
V
Output source current
I
REFSRC
1
mA
Output sink current
I
REFSNK
-1
mA
Load Capacitance
100
pF
PSRR
-48
dB
Digital Inputs
High level input current
I
IH
Input voltage = VDD
1
A
Low level input current
I
IL
Input voltage = 0V
-1
A
Input capacitance
C
I
8
pF
Notes:
1.
Integral non-linearity (INL) is the maximum deviation of the output from the line between zero and full scale (excluding the effects
of zero code and full scale errors).
2.
Differential non-linearity (DNL) is the difference between the measured and ideal 1LSB amplitude change of any adjacent two
codes. A guarantee of monotonicity means the output voltage changes in the same direction (or remains constant) as a change in
digital input code.
3.
Zero code error is the voltage output when the DAC input code is zero.
4.
Gain error is the deviation from the ideal full scale output excluding the effects of zero code error.
5.
Power supply rejection ratio is measured by varying V
DD
from 4.5V to 5.5V and measuring the proportion of this signal imposed on
the zero code error and the gain error.
6.
Zero code error and Gain error temperature coefficients are normalised to full scale voltage.
7.
Output load regulation is the difference between the output voltage at full scale with a 10k
load and 2k
load. It is expressed as
a percentage of the full scale output voltage with a 10k
load.
8.
I
DD
is measured while continuously writing code 2048 to the DAC. For V
IH
< V
DD
- 0.7V and V
IL
> 0.7V supply current will increase.
9.
Typical supply current in power down mode is 10nA. Production test limits are wider for speed of test.
10. Slew rate results are for the lower value of the rising and falling edge slew rates.
11. Settling time is the time taken for the signal to settle to within 0.5LSB of the final measured value for both rising and falling edges.
Limits are ensured by design and characterisation, but are not production tested.
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