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Электронный компонент: WM5615I

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Lutton Court, Bernard Terrace, Edinburgh EH8 9NX. UK
Tel: +44 (0) 131 667 9386 Fax: +44 (0) 131 667 5176
email: admin@wolfson.co.uk
www: http://www.wolfson.co.uk
Production Data
January 1997 Rev 2
10-Bit Digital-to-Analogue Converter
Description
The WM5615 is a 10-bit voltage output digital-to-
analogue converter (DAC) with a buffered reference input
(high impedance). The DAC produces a maximum output
voltage that is twice the reference voltage and the DAC is
monotonic. The device is simple to use, running from a
single supply of 5V. A power-on reset function is
incorporated to ensure repeatable start-up conditions.
Digital control of the WM5615 is over a 3-wire serial bus
that is CMOS compatible and easily interfaced to industry
standard microprocessor and microcontroller devices. The
device receives a 16-bit data word to produce the
analogue output. The digital inputs feature Schmitt
triggers for high noise immunity. Digital communication
protocols include the SPI
TM
, QSPI
TM
and
Microwire
TM
stand-
ards.
The 8-terminal small-outline D package allows digital
control of analogue functions in space-critical applications.
The WM5615C is characterised for operation from 0
o
C to
70
o
C. The WM5615I is for operation from -40
o
C to 85
o
C.
Features
10-bit CMOS voltage output DAC in an
8-terminal package
5V single supply operation
3-wire serial interface
High-impedance reference input
Maximum voltage output twice reference
input voltage
Internal power-on reset
Low power consumption ... 1.75mW max
877kHz update rate
Setting time to 0.5 LSB ... 12.5




s typical
Monotonic over temperature
Pin compatible with the Maxim MAX515
Applications
Battery-powered test Instruments
Digital offset and gain adjustment
Battery-operated/remote industrial controls
Machine and motion control devices
Cellular telephones
Wolfson Microelectronics
1996 Wolfson Microelectronics
VDD
16-BIT SHIFT REGISTER
CS
SCLK
DIN
DOUT
(LSB)
2
Xs
4
DUMMY
BITS
(MSB)
CONTROL
LOGIC
POWER-ON
RESET
RESISTOR
STRING
DAC
VOUT
10-BIT DAC REGISTER
Block Diagram
R
R
WM5615
5
SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of
National Semiconductor Corp.
+
-
Production Data data sheets contain final
specifications current on publication date.
Supply of products conforms to Wolfson Mi-
croelectronics standard terms and conditions.
AGND
+
-
REFIN
Wolfson Microelectronics
2
WM5615
DEVICE TEMP RANGE PACKAGE
WM5615CD
0
o
C to +70
o
C
8 pin SO
WM5615CP
0
o
C to +70
o
C
8 pin DIP
WM5615ID
-40
o
C to +85
o
C
8 pin SO
WM5615IP
-40
o
C to +85
o
C
8 pin DIP
Absolute Maximum Ratings
Supply voltage (V
DD
to AGND) . . . . . . . . . . . . 7V
Digital input voltage range to AGND . .-0.3V to V
DD
+0.3V
Ref. input voltage range to AGND . . .-0.3V to V
DD
+ 0.3V
Output voltage at OUT from external source . .V
DD
+ 0.3V
Continuous current, any terminal . . . . . . . . 20mA
Operating free-air temperature range T
A:
WM5615C . . . . . . . . . . . . . . . . . . 0
o
C to +70
o
C
WM5615I . . . . . . . . . . . . . . . . . -40
o
C to +85
o
C
Storage temperature range T
stg
. . . . . -65
o
C to +150
o
C
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds . . . . . . . . . . . . . .260
o
C
DIN
SCLK
CS
DOUT
V
DD
VOUT
REFIN
AGND
1
2
3
4
5
6
7
8
Ordering Information
Pin Configuration
D or P package
Top View
Note:
Stresses beyond those listed under 'Absolute Maximum Ratings' may cause damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated
under 'Recommended Operating Conditions' is not implied. Exposure to absolute maximum rated conditions for
extended periods may affect device reliability.
Recommended Operating Conditions
PARAMETER
SYMBOL
MIN TYP
MAX UNIT
Supply voltage
V
DD
4.5
5
5.5
V
High-level digital input voltage
V
IH
2.4
V
Low-level digital input voltage
V
IL
0.8
V
Reference voltage to REFIN terminal
V
ref
0
2.048
V
DD
-2
V
Load resistance
R
L
2
k
Operating free air temperature
WM5615C
T
A
0
70
o
C
WM5615I
T
A
-40
85
o
C
WM5615
Wolfson Microelectronics
3
Resolution
10
bits
Integral nonlinearity
INL
(see note 1)
1
LSB
Differential nonlinearity
DNL
(see note 2)
+0.1
0.5
LSB
Zero scale error (offset error) E
ZS
(see note 3)
3
LSB
Zero scale error (offset error)
(see note 4)
3
ppm/
o
C
temperature coefficient
Gain error
E
G
(see note 5)
3
LSB
Gain error temperature
(see note 6)
1
ppm/
o
C
coefficient
Power-supply rejection ratio
PSRR
Offset (see notes 7 and 8)
0.1
LSB/V
Gain
0.1
Analogue full scale output
R
L
= 100k
2Vref(1023/1024)
V
Electrical Characteristics
(over recommended operating free-air temperature range)
V
DD
= 5.0V 5%, V
ref =
2.048V unless otherwise stated.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Static DAC Specifications
Notes:
1. The relative accuracy or integral nonlinearity (INL),
sometimes referred to as linearity error, is the
maximum deviation ot the output from the line
between zero and full scale, excluding the effect of
zero code and full scale errors (see text).
2. The differential nonlinearity (DNL), sometimes
referred to as differential error, is the difference
between the measured and ideal LSB amplitude
change of any two adjacent codes. Monotonic means
the output voltage changes in the same direction (or
remains constant) as a change in the digital input
code.
3. Zero-scale error is the deviation from zero voltage
output when the digital input is zero (see text)
4. Zero-scale error temperature coefficient is given by
E
ZS
TC = [E
ZS
(T
max
) - E
ZS
(T
min
)] /V
ref
x 10
6
/ (T
max-
T
min
)
Voltage Output (OUT)
5. Gain error is the deviation from the ideal output (Vref
- 1LSB) with an output load of 10k
, excluding the
effects of zero error.
6. Gain temperature coefficient is given by EG TC =
[E
G
(T
max
) - E
G
(T
min
)] /V
ref
x 10
6
/(T
max
-T
min
).
7. Zero-scale offset error rejection ratio (E
ZS
-RR) is
measured by varying the V
DD
from 4.5V to 5.5V DC
and measuring the proportion of this signal imposed
on the zero-code output voltage.
8. Gain error rejection ratio (E
G
-RR) is measured by
varying the V
DD
from 4.5 to 5.5 V DC and measuring
the proportion of this signal imposed on the full-scale
output voltage after subtracting the zero scale
change.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Voltage output range
V
O
R
L
= 10k
0
V
DD
-0.4
V
Output load regulation accuracy
V
O
(OUT) = 2V RL=2k
0.5
LSB
Output short circuit current
I
OSC
OUT to V
DD
or AGND
20
mA
Output voltage, low level
V
OL(low)
I
O
(OUT) <= 5mA
0.25
V
Output voltage, high level
V
OH(high)
I
O
(OUT) <= -5mA
4.75
V
Wolfson Microelectronics
4
WM5615
Output voltage high
V
OH
I
O
= -2mA
V
DD
-1
V
Output voltage low
V
OL
I
O
= 2mA
0.4
V
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Supply voltage
V
DD
4.5
5
5.5
V
V
DD
= 5.5V, no load. V
ref
= 0V
150
250
A
Power supply current
I
DD
All inputs = 0V or V
DD
V
DD
= 5.5V, no load. V
ref
= 2.048V
230
350
A
All inputs = 0V or V
DD
High level digital input voltage
V
IH
2.4
V
Low level digital input voltage
V
IL
0.8
V
High level digital input current
I
IH
V
I
= V
DD
1
A
Low level digital input current
I
IL
V
I
= 0V
1
A
Input capacitance
C
I
8
pF
Digital Output (DOUT)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Input voltage range
V
I
0
V
DD
-2
V
Input resistance
10
M
Input capacitance
C
I
5
pF
Digital Inputs (DIN, SCLK, CS)
Electrical Characteristics
(continued)
V
DD
= 5.0V 5%, V
ref =
2.048V unless otherwise stated.
Reference Input (REFIN)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Power Supply
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
WM5615
Wolfson Microelectronics
5
Setup time, DIN before SCLK high
t
su
(DS)
45
ns
Hold time, DIN valid after SCLK high
t
h
(DH)
0
ns
Setup time, CS low to SCLK high
t
su
(CSS)
1
ns
Setup time CS high to SCLK high
t
su
(CS1)
50
ns
Hold time, SCLK low to CS low
t
h
(CSHO)
1
ns
Hold time, SCLK low to CS high
t
h
(CSHI)
0
ns
Pulse duration, min. chip select pulse width height
t
w
(CS)
20
ns
Pulse duration, SCLK low
t
w
(CL)
18
ns
Pulse duration, SCLK high
tw (CH)
18
ns
Output Switching Specification
PARAMETER SYMBOL MIN TYP MAX UNIT
Output slew rate
SR
C
L
= 100pF R
L
= 10 k
0.3
0.5
V/
s
T
A
= 25
o
C
Output settling time
t
S
T
O
0.5 LSB C
L
= 100pF
12.5
s
R
L
= 2k
(see note 9)
Glitch energy
DIN = All 0s to all 1s
5
nV
.
s
Signal to noise + distortion
S/(N+D)
V
ref
= 2V
pp
at 1kHz +
60
dB
2.048 V DC, code 512
Note 9:
Settling time is the time for the output signal to remain within 0.5 LSB of the final measured value for a digital
input code change from code zero to 1023 rising and 1023 to 64 falling.
Digital Input Timing Specifications
Electrical Characteristics
(continued)
V
DD
= 5.0V 5%, V
ref =
2.048V unless otherwise stated.
Analogue Output Dynamic Performance
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Propagation delay time
t
pd
(DOUT)
C
L
= 50pF
50
ns
Reference feedthrough
Input code = 00
-80
dB
(see note 10)
Reference input bandwidth
Input code = 512
100
kHz
(see note 10)
Note 10: Reference feedthrough and bandwidth are measured at the DAC output with Vref input = 2Vpp at 1kHz +
2.048V DC
reference input (REFIN)
PARAMETER
CONDITIONS MIN TYP MAX UNIT