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Электронный компонент: SP4666NAMP

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DS2219 - 2.4
SP4666
Prescaler with low current and low radiation
The SP4666 is a selectable division ratio high speed divider
capable of replacing separate fixed ratio ECL prescalers with a
single part in applications with alternative 464 and 4256 division
requirements.
A switched low pass filter with 23dB points at 53MHz and
156MHz is connected before the output stage to reduce the
harmonic content to a very low level.
FEATURES
s
Switched Low Pass Filter for Very Low Output Radiation
s
Low Supply Current
s
Input Wideband Amplifier
s
High Input Sensitivity
s
High Input Impedance
s
Balanced ECL Outputs
s
Electrostatic Protection
ESD precautions must be observed
Fig. 2 SP4666 block diagram
1k
V
CC
1k
INPUTS
2
3
5
OUTPUTS
0V
7
6
8
4
500
500
2k
2k
4
64/4256
V
CC
20k
10k
50
A
2mA
4
64/4256 SELECT
FILTER
1
7V
25V p-p
2
55
C to 1150
C
0
C to180
C
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
CC
Input voltage
Storage temperature
Operating temperature range
ORDERING INFORMATION
SP4666 NA DP
SP4666 NA MP
Fig 1. Pin connections - top view
MP8
DP8
NC
INPUT
INPUT
0V
1
5V
OUTPUT
OUTPUT
4
64 /4256 SELECT
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
1
5V
OUTPUT
OUTPUT
4
64 /4256 SELECT
NC
INPUT
INPUT
0V
SP4666
SP4666
2
SP4666
ELECTRICAL CHARACTERISTICS
These characteristics are guaranteed over the following conditions (unless otherwise stated):
T
AMB
= 0
C to 180
C, V
CC
= 45V to 55V (Test circuit see Fig. 3)
Characteristic
Supply current, I
CC
Input sensitivity
50MHz
200MHz to 1050MHz
1050MHz to 1300MHz
Input overload
Input impedance
Output voltage with 12pF load
Output impedance
Output imbalance
Voltage for 4256 operation
Voltage for 464 operation
Sink current for 4256 operation
Conditions
Value
Typ.
Max.
Min.
Units
30
10
5
10
05
250
mA
mV
mV
mV
mV
pF
V p-p
V p-p
V p-p
V p-p
V p-p
V p-p
V
V
V
A
8
2,3
2,3
2,3
6,7
6,7
6,7
5
5
5
500
08
08
04
07
025
06
35
23
25
05
50
2
1
1
05
09
035
07
500
01
Pin
V
CC
= 15V
RMS sinewave (50
system)
See Fig. 6
4
64 mode, f
IN
= 100MHz
4
256 mode, f
IN
= 100MHz
4
64 mode, f
IN
= 1000MHz
4
256 mode, f
IN
= 1000MHz
4
64 mode, f
IN
= 1300MHz
4
256 mode, f
IN
= 1300MHz
See note 1
Vpin5 = 0V
Fig. 4 Application circuit
1
2
3
4
8
7
6
5
12p
1
5V
1n
01
OUTPUTS
0V
100p
1 TURN
1n
UHF INPUT
VHF INPUT
SP4666
NOTE: For 464 operation,
pin 5 may be left open
circuit or connected to 15V
Fig. 3 Test circuit
1n
1
5V
1n
180
HYBRID
COUPLER
01
OUTPUT
12p
12p
50
A
50
SIGNAL
GENERATOR
B
C
D
50
SAMPLING
SCOPE
0V
SP4666
1
2
3
4
8
7
6
5
OPEN = 464
CLOSED = 4256
OUTPUT
NOTES
1. Pin 5 has an internal pull-up and may be left open-circuit for 464 operation.
2. The difference between the maximum input sensitivity and minimum overload voltage is the guaranteed dynamic range. Input signal levels should
be maintained within these limits at all frequencies.
3
SP4666
Fig. 5 Typical input sensitivity
Fig. 6 Typical input impedance (frequencies in MHz)
j 2
j 1
j 0.5
j 0.2
0
2
j 0.2
2
j 0.5
2
j 1
2
j 2
1
0.5
0.2
j 5
2
j 5
2
5
1000
200
50
500
S
11
Z
O
= 50
1300
16
14
12
10
8
6
4
2
0
0 200 400 600 800 1000 1200 1400
FREQUENCY (MHz)
V
IN
(mV RMS INTO 50
)
TYPICAL DEVICE
SPECIFICATION LIMIT
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