SP8401
Very Low Phase Noise 300MHz
10/11
DS3230
ISSUE 3.1
April 1994
Ordering Information
SP8401 KG MPES(Commercial Grade)
The SP8401 is a very low phase noise variable modulus
divider. Special circuit techniques have been used to reduce
the phase noise considerably below that produced by
standard dividers. The modulus control input is CMOS or TTL
compatible.
The SP8401 is packaged in a 28 pin plastic SO package
to be compatible with the SP8400 and SP8402 devices.
FEATURES
I Very low Phase Noise (Typically -160dBc/Hz at 1kHz
offset)
I Supply Voltage 5V
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
6.5V
Output Current
20mA
Storage Temperature Range
-55
C to +125C
Maximum Clock Input Voltage
2.5V p-p
MP28
Fig.1 Pin connections - top view
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
N/C
N/C
N/C
V
CC
+5V
GND
CLOCK INPUT
CLOCK INPUT
CLOCK INPUT
CLOCK INPUT
GND
V
CC
+5V
V
CC
+5V
N/C
MODULUS CONTROL
N/C
N/C
N/C
N/C
N/C
N/C
N/C
OUTPUT
OUTPUT
N/C
V
CC
+5V
N/C
N/C
N/C
Fig.2 Typical single sideband phase noise measured at 300MHz
(f) (dBc/Hz) 3dB
Frequency (Hz)
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150
160
170
1
10
100
1k
10k
100k
2
SP8401
Fig.3 Typical input sensitivity
ELECTRICAL CHARACTERISTICS
Guaranteed over: Supply voltage V
CC
= +4.75V to +5.25V Temperature T
amb
= -10
C to +75C
Tested at +4.75V and +5.25V at T
amb
= +25
C
Min.
Typ.
Max.
Supply current
Output voltage swing
Input sensitivity 50MHz to 300MHz
Modulus Control Inputs
Logic high voltage
Low low voltage
Input current
Set up time t
s
Release time t
r
57
440
4
4
64
140
(-4)
0.8
180
50
340
2.2
4, 11, 12, 18
20, 21
7, 8
14
14
14
14
14
Output loaded with 300R See Fig.5
p-p @ 330MHz input
11 mode
Output loaded with 300R
RMS Sine wave into 50 Ohms
(dBm equivalent) See Fig.3
10 mode
11 mode
Modulus control input voltage 5V
mA
mV
mV
dBm
V
A
ns
ns
Units
Value
Conditions
Characteristic
Pin
INPUT FREQUENCY (MHz)
400
300
200
100
0
50
100
150
200
250
300
350
355mV
140mV
OPERATING WINDOW
V
IN
mV
RMS
Fig.4 Timing diagram
5
CLOCK INPUT
MODULUS
CONTROL
INPUT
OUTPUT
t
r
t
s
6
5
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