1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.
Features
Very High Operating Speed
Operation down to DC with Square Wave Input
Low Phase Noise (Typically better than -
152dBc/Hz at 10kHz)
5V Single Supply Operation
Low Power Dissipation: 500mW (Typ)
Surface Mount Plastic Package With Exposed
Pad (See Application Notes
Applications
DC to 10 GHz PLL applications
HyperLan
LMDS
Instrumentation
Satellite Communications
Fibre Optic Communications; OC48, OC192
Ultra Low Jitter Clock Systems
Description
Description The ZL40812 is one of a range of 5V
supply, very high speed low power prescalers for
professional applications with a fixed modulus of divide
by 16. The dividing elements are static D type flip flops
and therefore allow operation down to DC if the drive
signal is a pulse waveform with fast risetimes. The
output stage has internal 50 ohm pull up giving a 1V p-
p output. See application notes for more details.
July 2003
Ordering Information
ZL40812/DCE (tubes)
8 lead e-pad SOIC
ZL40812/DCF (tape and reel) 8 lead e-pad SOIC
-40
C to +85
C
ZL40812
10GHz Fixed Modulus
16
Data Sheet
Figure 1 - Block Diagram
Vref
Div 16
20mA
50 Ohm
400 Ohm
VCC IN
VCC OUT
OUTPUT
OUTPUT B
INPUT
INPUT B
GND
GND
1
2
3
4
8
7
6
5
ZL40812
Data Sheet
2
Zarlink Semiconductor Inc.
Pin Connection - Top View
Application Configuration
Figure 2 shows a recommended application configuration. This example shows the devices set up for single ended
operation.
Figure 2 - Recommended Circuit Configuration
The above circuit diagram shows some components in dotted lines. These are optional in many applications.
1. C1 (10 F) and C2 (10 nF) power supply decoupling capacitors may be available on the board already.
2. R3 (100 Ohm) and C8 (10 nF) can be included if further power supply decoupling is required for the first stage
biasing circuit. This may optimise the noise and jitter performance. The values are suggestions and may have
to be modified if the existing supplies are particularly noisy.
3. R1 (50 Ohm), in series with C5 (100 pF), may reduce feedthrough of the input signal to the output.
4. R2 (50 Ohm) and C7 (10 nF) will help to balance the current drawn from the power supply and may reduce volt-
age transients on the power supply line
Vcc INPUT
INPUT
INPUT B
GND
Vcc OUTPUT
OUTPUT
OUTPUT B
GND
1
2
3
4
5
6
7
8
SOIC (N) E-Pad
1
8
7
2
3
6
5
4
C2:10nF
C4:100pf
C5:100pf
C6:10nF
C7:10nF
Vcc 5V
Example Configuration for Single ended operation
C1:10uF
R2:50ohm
R1:50ohm
C3:100pF
R3:100ohm
C8:10nF
ZL40812
Data Sheet
3
Zarlink Semiconductor Inc.
Evaluation Boards From Zarlink Semiconductor
Zarlink Semiconductor provides prescaler evaluation boards. These are primarily for those interested in performing
their own assessment of the operation of the prescalers.
The boards are supplied unpopulated and may be assembled for single ended or differential input and output
operation, type No. ZLE40008. Fully populated evaluation boards are also available, type No. ZLE40810. Once
assembled, all that is required is an RF source and a DC supply for operation. The inputs and outputs are
connected via side launch SMA connectors.
AC/DC Electrical Characteristics
Note 1:
The device characterisation test method incremented the amplitude over the entire range of frequency and ensures that there
are no "holes" in the characteristic.
Input sensitivity and output power values assume 50 Ohm source and load impedances.
Characteristics are guaranteed by either production test or design.
Absolute Maximum Ratings
Parameter
Symbol
Min
Max
Units
1
Supply Voltage
Vcc
6.5V
2
Prescaler Input Voltage
2.5
Vp-p
3
ESD protection (Static Discharge)
2
kV
4
Storage temperature
T
ST
-65
150
C
5
Maximum Junction Temp
125
C
6
Thermal Characteristics
Thja
58.6
C/W
multi-layer PCB
Electrical Characteristics
(Tamb = 25C, Vcc = 5V)
Characteristic
Pin
Min.
Typ.
Max.
Units
Conditions
Supply current
1
0.35
mA
Input stage bias current
Supply current
8
100
130
mA
Divider and output stages
Input frequency
2,3
2
11
GHz
RMS sinewave (See Note 1)
Input sensitivity
2,3
-8
dBm
fin = 1GHz to 2GHz
Input sensitivity
2,3
-15
-10
dBm
fin = 2GHz to 9.5GHz
Input sensitivity
2,3
-10
0
dBm
fin = 11GHz
Input overload
2,3
8
dBm
fin = 1GHz to 4GHz
Input overload
2,3
11
dBm
fin = 5GHz to 11GHz
Input Edge Speed
2,3
900
V/s
For <2GHz operation.
Output voltage
6,7
1
Vp-p
Differential Into 50ohm pullup resistors
Output power
6,7
-3
-1
1.2
dBm
Single-ended output, fin = 2GHz to
10GHz, pwr ip= -10dBm
Phase Noise
(10kHz offset)
6,7
-152
dBc/Hz
Fin = 5GHz, pwr ip = 0dBm
See Figure 5 to Figure 8.
O/P Duty Cycle
6,7
45
50
55
%
ZL40812
Data Sheet
4
Zarlink Semiconductor Inc.
Figure 3 - Input Sensitivity @ +25 Deg C
Electrical Characteristics
(Vcc = 5V 5%, Tamb = -40 to +85C)
Note 1:
Pin 1 is the Vcc pin for the 1
st
stage bias current. In some applications e.g. if the power supply is noisy, it may be
advantageous to add further supply decoupling to this pin (i.e. an additional R, C filter, see diagram of the recommended
circuit configuration, Figure 2).
These characteristics are guaranteed by design and characterisation over the range of operating conditions unless otherwise stated.
(Input Frequency range 1 to 10GHz rms Sinewave)
Characteristics
Pin
Min.
Typ.
Max.
Units
Conditions
Supply current
1
0.35
mA
Input stage bias current, see Note 1.
Supply current
8
70
99
127
mA
-40 degC 5.25V
Supply current
8
57
80
103
mA
-40 degC 4.75V
Supply current
8
78
109
140
mA
+25 degC 5.25V
Supply current
8
63
88
114
mA
+25 degC 4.75V
Supply current
8
84
119
153
mA
+85 degC 5.25V
Supply current
8
65
94
123
mA
+85 degC 4.75V
Typical input sensitivity (sinewave drive) @ +25 Deg C
-40.00
-30.00
-20.00
-10.00
0.00
10.00
20.00
0
1
2
3
4
5
6
7
8
9
10
11
12
13
Input Frequency (GHz)
Vin
int
o
50
Oh
m
(d
Bm
)
25C
MAX (Typ)
GUARANTEED
OPERATING WINDOW
Input frequency extends to DC if the
source has an edge speed of 900 V/us or more
ZL40812
Data Sheet
5
Zarlink Semiconductor Inc.
Note 1:
for an input signal frequency of less than 2GHz, the slew rate of the sinewave signal becomes progressively too slow for the
divider.
Input sensitivity and output power values assume 50 Ohm source and load impedances
For details of the test set-up, refer to the Application Note for RF Prescalers.
The following graph summarizes the Input and Output Characteristics table:
Figure 4 - Input Sensitivity @ -40, +25, +70 and +85 Deg C
Input and Output Characteristics
Characteristic
Pin
Min.
Typ.
Max.
Units
Conditions
Input sensitivity
2,3
-15
-10
dBm
Tamb = 85C, Fin = 2 to 8 GHz
Input overload
2,3
2
5
dBm
fin = 2 GHz
Input overload
2,3
2
8
dBm
fin = 4 GHz
Input overload
2,3
5
13
dBm
fin = 9 GHz
Input overload
2,3
5
11
dBm
fin = 10 GHz
Input Edge Speed
2,3
900
V/s
For <2GHz Operation, see Note 1
Output voltage
6,7
1
Vp-p
Differential Into 50ohm pullup resistors
Output power
6,7
-4
-1
2
dBm
Single-ended output, fin = 2GHz to
10GHz, pwr ip= -10dBm
O/P Duty Cycle
6,7
45
50
55
%
Trise and Tfall
6,7
110
ps
Typical input sensitivity (sinewave drive) @ -40 to +85 Deg C
-40.00
-30.00
-20.00
-10.00
0.00
10.00
20.00
0
1
2
3
4
5
6
7
8
9
10
11
12
13
Input Frequency (GHz)
V
i
n
i
n
to
5
0
O
h
m
(d
Bm
)
85C
70
25C
-40C
MAX (Typ)
GUARANTEED
OPERATING WINDOW
85 Deg C
70 Deg C
25 Deg C
Input frequency extends to DC if the
source has an edgespeed of 900 V/us or less
ZL40812
Data Sheet
6
Zarlink Semiconductor Inc.
Phase Noise Measurement Graphs
The following graph show how the phase noise of the divider output varies with frequency offset from the output
(carrier) frequency.
Figure 5 - ZL40812 Phase Noise vs Offset Frequency
The following graph show how the phase noise of the divider output varies with input frequency. The output
frequency is the input divided by 16.
Figure 6 - ZL40812 Phase Noise vs Input Frequency
ZL40812 Phase Noise vs Offset
Pin = 0dBm, Vcc = 4.75V, Temp = 25 DegC
-160
-155
-150
-145
-140
-135
-130
0.1
1
10
100
Offset Frequency (kHz)
P
h
a
s
e
N
o
is
e
in
(
d
B
c
/H
z)
10GHz
5GHz
2GHz
ZL40812:Phase Noise vs Input Frequency
Pin = 0dBm, Vcc = 5.25V, 25 DegC
-160
-155
-150
-145
-140
-135
-130
-125
-120
2
4
6
8
10
Input Frequency (GHz)
P
h
ase N
o
i
s
e
(
d
B
c
/
H
z
)
100Hz
1kHz
10kHz
100kHz
ZL40812
Data Sheet
7
Zarlink Semiconductor Inc.
The following graph show how the phase noise of the divider output varies with input power.
Figure 7 - ZL40812 Phase Noise vs Input Power
The following graph show how the phase noise of the divider output varies with power supply voltage Vcc.
Figure 8 - ZL40812 Phase Noise vs Vcc
ZL40812: Phase Noise vs Input Power
Vcc = 5.25V, Input Frequency = 5GHz, T = 25 DegC
-160
-155
-150
-145
-140
-10
-5
0
5
Input Power (dBm)
P
h
as
e N
o
i
s
e (
d
B
c
/
H
z
)
100 Hz
1 KHz
10 KHz
100 KHz
ZL40812: Phase Noise v Vcc
Fin = 5GHz, Pin = 0dBm T = 25 DegC
-160
-155
-150
-145
-140
-135
-130
-125
-120
4.7
4.8
4.9
5
5.1
5.2
5.3
Supply Voltage (V)
P
h
as
e N
o
i
se (
d
B
c
/
H
z
)
100Hz
1kHz
10kHz
100kHz
ZL40812
Data Sheet
8
Zarlink Semiconductor Inc.
Single Ended Output Power
The following graphs show how the output power varies with supply.
Differential output power will be 3dB.
Figure 9 - Pout, Freq, Temp @ Vcc = 4.75V
Figure 10 - Pout, Freq, Temp @ Vcc = 5V
Frequency_sweep, Vcc = 4.75v
-4
-3
-2
-1
0
1
2
3
1000000000
10000000000
i/p frequency (Hz)
o/
p l
e
v
e
l
(
d
Bm)
Device 1,Temperature = -40C
Device 1,Temperature = 25C
Device 1,Temperature = 85C
Frequency_sweep, Vcc = 5v
-15
-14
-13
-12
-11
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
0
2000000000
4000000000
6000000000
8000000000
10000000000
12000000000
14000000000
i/p frequency (Hz)
o/
p l
e
v
e
l
(
d
Bm)
Device 1,Temperature = -40C
Device 1,Temperature = 25C
Device 1,Temperature = 85C
ZL40812
Data Sheet
9
Zarlink Semiconductor Inc.
Figure 11 - Pout, Freq, Temp @ Vcc = 5.25V
Frequency_sweep, Vcc = 5.25v
-4
-3
-2
-1
0
1
2
3
1000000000
10000000000
i/p frequency (Hz)
o/
p l
e
v
e
l
(
d
Bm)
Device 1,Temperature = -40C
Device 1,Temperature = 25C
Device 1,Temperature = 85C
ZL40812
Data Sheet
10
Zarlink Semiconductor Inc.
Oscillographs of the Divider Output Waveforms
The following oscillographs show that the low-level feedthrough of the input waveform can be further reduced by
summing the two output pins of the device differentially, refer to Figure 12 and Figure 13.
Figure 12 - Output waveform-single-ended
VCC=5V, Vin=2dBm, Fin=10GHz
Figure 13 - Output waveform - differential
VCC=5V, Vin=2dBm, Fin=10GHz
ZL40812
Data Sheet
11
Zarlink Semiconductor Inc.
Figure 14 - Output waveform - differential
VCC=4.75V, Vin=-10dBm, Fin=5GHz
Figure 15 - Output waveform - differential
VCC=4.75V, Vin=-dBm, Fin=2GHz
c Zarlink Semiconductor 2003 All rights reserved.
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ISSUE
DATE
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Package Code
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"Zarlink") is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the
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not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in
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Purchase of Zarlink's I
2
C components conveys a licence under the Philips I
2
C Patent rights to use these components in an I
2
C System, provided that the system
conforms to the I
2
C Standard Specification as defined by Philips.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.
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