-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
100
1000
10000
100000
PSA1780A
Telecommunications
Satellite
Telemetry
5
40
1780
-65
-106
-15
5
5.5
-40 to 85
Frequency Range
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style
PLL
MHz
dBc
dBc
mSec
mSec
C
Vdc
mA
Supply Voltage (Vcc, nom.)
Supply Current (Icc, typ.)
All specifications are typical unless otherwise noted and subject to change without notice.
PHASE NOISE (1 Hz BW, typical)
Z-Communications, Inc.
All rights reserved
Page 1
PHASE LOCKED LOOP
FEATURES
APPLICATIONS
PERFORMANCE SPECIFICATIONS
VALUE
UNITS
POWER SUPPLY REQUIREMENTS
APPLICATION NOTES
1780
MHz
Step Size:
50 KHz
- Style Package
PLL
A1
Rev
AN-107 : How to Solder Z-COMM VCOs / PLLs
AN-200 : Mounting and Grounding of Z-COMM PLLs
AN-201 : PLL Fundamentals AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<
f
osc
<100 MHz
Frequency Synthesizer: National Semiconductor - ADF4106
9939 Via Pasar San Diego, CA 92126
TEL (858) 621-2700 FAX (858) 621-2722
Power Output
32
dBm
Load Impedance
50
Step Size
50
KHz
3.13
1840
-
Frequency Range:
-
1840
Charge Pump Output Current
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
dBc/Hz
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