-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
1 E+3
10 E+3
100 E+3
PSA2100C
Telecommunications
Satellite
Telemetry
5
30
2066
-70
-107
-15
2
1.5
-40 to 70
Frequency Range
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style
PLL-24H
MHz
dBc
dBc
mSec
mSec
C
Vdc
mA
Supply Voltage (Vcc, nom.)
Supply Current (Icc, typ.)
All specifications are typical unless otherwise noted and subject to change without notice.
PHASE NOISE (1 Hz BW, typical)
Z-Communications, Inc.
All rights reserved
Page 1
PHASE LOCKED LOOP
FEATURES
APPLICATIONS
PERFORMANCE SPECIFICATIONS
VALUE
UNITS
POWER SUPPLY REQUIREMENTS
APPLICATION NOTES
2066
MHz
Step Size:
1000 KHz
- Style Package
PLL-24H
A1
Rev
AN-107 : How to Solder Z-COMM VCOs / PLLs
AN-200 : Mounting and Grounding of Z-COMM PLLs
AN-201 : PLL Fundamentals AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<
f
osc
<100 MHz Prescaler: 32
Frequency Synthesizer: Analog Devices - ADF4106
9939 Via Pasar San Diego, CA 92126
TEL (858) 621-2700 FAX (858) 621-2722
Power Output
03
dBm
Load Impedance
50
Step Size
1000
KHz
1250
2128
-
Frequency Range:
-
2128
Charge Pump Output Current
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
dBc/Hz
2 0 0 0
2 0 5 0
2 1 0 0
2 1 5 0
2 2 0 0
0
0.
25
0.
5
0.
75
1
1.
25
1.
5
1.
75
2
2.
25
2.
5
2.
75
3
3.
25
3.
5
3.
75
4
4.
25
4.
5
-4
-3
-2
-1
0
1
2
3
2038
2050
2062
2073
2084
2096
2107
2118
2128
2136
LOW COST - HIGH PERFORMANCE
PHASE LOCKED LOOP
Z-Communications, Inc.
Page 2
Printed in the U.S.A.
PSA2100C
VCO POWER CURVE, typ.
PAGE 2
PHYSICAL DIMENSIONS
17
19
15
13
1
2
3
4
8
10
12
24
22
20
5
6
7
9
11
14
16
18
21
23
TOP
P1 RF OUTPUT
P2-4 GROUND
P5 REFERENCE OSCILLATOR INPUT
P6 GROUND
P7 CLOCK
P8 DATA
P9 GROUND
P10 LOAD ENABLE
P11 GROUND
P12 LOCK DETECT
P13 VCC
P14 GROUND
P15 GROUND
P16 GROUND
P17 NO CONNECTION
P18-24 GROUND
TABS RANGE:
SEE NOTE 5
(4 PLACES)
DETAIL A
.015
.030
.055
DETAIL B (TYP)
(8 PLACES)
1.
The inside radius of all 24 half holes at the perimeter of
the board are plated to provide a surface for the
attachment of the PLL Module to the PCB. 16 pads are
for grounding, 8 pads are for signal interface.
2.
The surface of the shield is tin-plated and may be
soldered to. The shield's base metal is cold-rolled steel.
3.
The ground plane on the bottom side is ground and
attaches to a ground track on the top side of the board
as well as to the shield.
4.
Unless otherwise noted all dimensions are in inches.
5.
Unless otherwise noted all tolerances are as follows:
.xxx =
.010.
SEE DETAIL A
SEE DETAIL B
PIN 1
BOTTOM
.000
.153
.238
.323
.408
.493
.578
.663
-.025
.841
.0
0
0
.1
1
5
.2
0
0
.2
8
5
.3
7
0
.4
5
5
.5
8
0
-.
02
6
.6
0
5
.816
0.
22
0
.0
3
2
SIDE VIEW
c
25
VCO TUNING CURVE, typ.
FREQUENCY (MHz)
TUNING VOLTAGE (Vdc)
c
25
c
-40
c
70
FREQUENCY (MHz)
OUTPUT POWER (dBm)
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