ISSUE 1 - FEBRUARY 2001
ZXFBF05
DEVICE DESCRIPTION
The ZXFBF05 is a low cost, high slew rate, quad buffer
amplifier. Built using the Zetex CA700 technology, this
buffer has a small signal bandwidth of greater than
100MHz and a 1 volt pk-pk bandwidth of greater than
20 MHz. Each channel draws only 7.5mA. The device
operates from a 5 volt supply, which makes it ideal in
a majority of applications.
This space saving buffer may be used in a wide variety
of applications such as, video switching matrix,
multi-channel instrumentation equipment, and A/D
input buffer, etc.
FEATURES AND BENEFITS
4 Buffers per package
Low distortion Class A O/P
100MHz bandwidth
Low cost
Designed for up to 300pF load
Low supply current (7.5mA per buffer)
No thermal runaway
14 pin SOIC package
APPLICATIONS
Video Switching Matrix input buffer
Instrumentation
Multi-channel A/D input buffer
Multi-isolation buffer
PART
NUMBER
PACKAGE
PART MARK
ZXFBF05N14
SOIC14N
ZXFBF05
ORDERING INFORMATION
PART NUMBER
CONTAINER
INCREMENT
ZXFBF05N14TA
Reel 7"
500
ZXFBF05N14TC
Reel 13"
2500
RELATED PRODUCTS
ZXFBF04 4 Channel Buffer
ZXFBF08 8 Channel Buffer
ZXFBF25 4 Channel Buffer with output enable
4 Channel Buffer Device with high capacitance
load capability
1
OUT1
IN1
OUT4
IN4
V+
IN2
OUT2
IN3
OUT3
14 PIN SOIC PACKAGE
V-
NC
NC
NC
NC
CONNECTION DIAGRAM
ISSUE 1 - FEBRUARY 2001
2
Vin=370mV pk-pk,
F = 4 MHz
RL = 1k
V
out
ABSOLUTE MAXIMUM RATINGS
Voltage on any pin
20V (relative to V-)
Operating temperature range
0 to 70C (de-rated for -40 to 85C)
Storage Temperature
-55 to 125C
ELECTRICAL CHARACTERISTICS
Test Conditions: Temperature =25C, V+ = 5.00, V- = -5.00V, R
L
= 1k
, C
L
= 10pF
Parameter
Conditions
Min.
Typical
Max.
Units
Offset Voltage
V
in
= 0V
-25
-
25
mV
Offset Voltage Drift
V
in
= 0V
20
V/C
Supply Current
All inputs = 0V
5.0
30
40
mA
Input Bias Current
V
in
= 0V
0.1
1.0
2.0
A
Output Voltage
R
L
= 200
1
V
DC Gain
V
in
= 0.5V, R
L
= 1k
V
offset
= 0.0V
0.95
0.98
1.00
V/V
DC Gain
V
in
= 0.5V, R
L
= 1k
V
offset
= 0.25V
0.95
0.98
1.00
V/V
Sink Current
V
in
= 0V, V
out
=0.5V
4.0
6.0
12.0
mA
Source Current
V
in
= 0V, V
out
=-0.5V
8.0
15.0
18.0
mA
Input Resistance
10
20
100
M
Output Resistance
5
10
15
Bandwidth
20mVp-p,
1.0Vp-p
100
20
MHz
Slew Rate
40
V/
s
Voltage Noise
10 100 kHz
15
nV/
Hz
Differential Gain
NTSC
F = 3.58MHz, V
in
= 0.286Vp-p,
DC
V
in
= 0 to 0.714V
0.1
%
Differential Phase
NTSC
0.1
5
Degrees
Differential Gain
PAL
F = 4.43MHz, V
in
= 0.286Vp-p,
DC
V
in
= 0 to 0.714V
0.1
%
Differential Phase
PAL
0.15
Degrees
Channel Isolation
V
in
= 370mVp-p, RL = 1k
F = 4 MHz
-60
dB
NOTES
Test circuit for measuring channel isolation.
Channel Isolation = 20 x LOG
10
(V
out
/ V
in
) dB
ZXFBF05
ISSUE 1 - FEBRUARY 2001
ZXFBF05
3
OUT1
IN1
OUT4
IN4
V+
IN2
OUT2
IN3
OUT3
14 PIN SOIC PACKAGE
V-
NC
NC
NC
NC
OUT 1,2,3,4
Buffer outputs.
IN 1,2,3,4
Buffer Inputs.
V+
Positive supply pin, +5 volts.
V-
Negative supply pin, -5 volts.
PIN DESCRIPTION
APPLICATION CIRCUIT
DC Coupled Configuration
ISSUE 1 - FEBRUARY 2001
4
C
V-
R
L
+
_
1/4 ZXFBF04
V+
100nF
100nF
R
S
V
out
V
in
APPLICATION CIRCUIT
AC Coupled Configuration
NOTE.
Rs: Source Resistor, provides DC bias for buffer input. Rs
10k
Both 100nF decoupling capacitors should be situated close to device supply pins.
TYPICAL CHARACTERISTICS
0.1
1
10
-100
-90
-80
-70
-60
-50
-40
-50
-25
0
25
50
75
100
0.986
0.987
0.988
0.989
0.990
0.991
Channel Isolation v Frequency
A
tte
n
a
t
i
o
n
(d
B
)
Frequency (MHz)
R
L
= 1k
V+ = 5V
DC Differential Gain v Temperature
D
C
Ga
in
(V
in
/V
ou
t
)
Temperature (C)
ZXFBF05
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