1
Z86160
CP96TEL1700
P R E L I M I N A R Y
n
0
C to +70
C Temperature Range
n
512 Bytes Battery Backed-Up (BBU) Secure RAM
n
Keypad Buffer
n
LED Controller
n
Two Comparators
n
Two On-Chip Counter/Timers
CP96TEL1700 (3/96)
P
RELIMINARY
C
USTOMER
P
RODUCT
S
PECIFICATION
GENERAL DESCRIPTION
To unburden the program from coping with real-time
problems such as counting/timing, and serial data com-
munications, the Z86160 offers two on-chip counter/timers
with a large number of user selectable modes, and an
asynchronous receiver/transmitter (UART) (see Block
Diagram).
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
V
CC
V
DD
Ground
GND
V
SS
FEATURES
Z86160
S
ET
-T
OP
C
ONTROLLER
ROM
RAM*
Package
Part
Kbytes Bytes
Speed
Information
Z86160
3 2
768
1 6
100-Pin QFP
The Z86160 is a member of the Z8
single-chip
microcontroller family offering a unique architecture that is
characterized by Zilog's 8-bit microcontroller core.
This CMOS microcontroller features fast execution,
efficient use of memory, sophisticated interrupts, input/
output bit manipulation capabilities, and easy hardware/
software system expansion along with low-cost and
low-power consumption.
For applications demanding powerful I/O capabilities, the
Z86160 fulfills this with custom I/O, specifically tailored to
meet the needs of set-top requirements.
Four basic address spaces, the Program Memory, Data
Memory, 236 General-Purpose Registers, and 512 bytes
of protected RAM, support a wide range of memory
configurations. The protected RAM is mapped into data
memory.
*General-Purpose
n
3.0- to 5.5-Volt Operating Range
n
Low-Power Consumption
n
Custom Input/Output Lines
2
Z86160
CP96TEL1700
P R E L I M I N A R Y
GENERAL DESCRIPTION
Figure 1. Z86160 Functional Block Diagram
Port 3
UART
Counter/
Timers
(2)
Interrupt
Control
Port 2
I/O
(Bit Programmable)
ALU
FLAGS
Register
Pointer
Register File
256 x 8-Bit
Machine Timing and
Instruction Control
Prg. Memory
32,768
x 8-Bit
Program
Counter
Vcc
GND
XTAL
4
4
Port 0
Output
Input
Address or I/O
(Nibble Programmable)
Port 1
8
Address/Data or I/O
(Byte Programmable)
/AS /DS R//W /RESET
Custom
Logic
I/O
Secure
RAM
512 Bytes
3
Z86160
CP96TEL1700
P R E L I M I N A R Y
Figure 2. Z86160 100-Pin QFP Package
PIN DESCRIPTION
100
30
51
81
Z86160
QFP
1
31
50
80
4
Z86160
CP96TEL1700
P R E L I M I N A R Y
PIN DESCRIPTION
(Continued)
Z86160 100-Pin QFP Pin Identification
Pin #
Symbol
1
EXADR14
2
EXR/W
3
EXADR07
4
EXADR12
5
GND
6
EXADR13
7
EXADR08
8
EXADR06
9
EXADR09
1 0
V
CC
1 1
EXADR05
1 2
EXADR11
1 3
EXADR04
1 4
/EXDS
1 5
GND
1 6
EXADR03
1 7
EXADR10
1 8
EXADR02
1 9
/EXRAMCS
2 0
EXADR01
2 1
D7
2 2
EXADR00
2 3
D6
2 4
D0
2 5
GND
Pin #
Symbol
2 6
V
CC
2 7
D5
2 8
D1
2 9
D4
3 0
D2
3 1
D3
3 2
S 0
3 3
S 1
3 4
GND0
3 5
GND1
3 6
GND2
3 7
GND3
3 8
S 2
3 9
GND
4 0
I0
4 1
I1
4 2
I2
4 3
I3
4 4
I4
4 5
I5
4 6
I6
4 7
I7
4 8
K0
4 9
V
CC
5 0
S 3
Pin #
Symbol
5 1
S 4
5 2
S 5
5 3
S 6
5 4
K1
5 5
S 7
5 6
T0
5 7
T1
5 8
T2
5 9
T3
6 0
T4
6 1
T5
6 2
GND
6 3
T6
6 4
T7
6 5
M0
6 6
M1
6 7
M2
6 8
V
CC
6 9
M3
7 0
K2
7 1
M4
7 2
K3
7 3
M5
7 4
K4
7 5
M6
Pin #
Symbol
7 6
M7
7 7
ON/OFF
7 8
GND
7 9
N1
8 0
N2
8 1
V
CC
8 2
K5
8 3
N3
8 4
K6
8 5
K7
8 6
L0
8 7
L1
8 8
L3
8 9
B0
9 0
B1
9 1
GND
9 2
XTAL1
9 3
XTAL2
9 4
GND
9 5
B2
9 6
B3
9 7
L4
9 8
N4
9 9
N5
100
L5
5
Z86160
CP96TEL1700
P R E L I M I N A R Y
ABSOLUTE MAXIMUM RATINGS
Symbol
Description
Min
Max
Units
V
CC
Supply Voltage*
0.3
+7.0
V
T
STG
Storage Temp
65
+150
C
T
A
Oper Ambient Temp
0
70
C
Notes:
* Voltages on all pins with respect to GND.
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for an extended pe-
riod may affect device reliability.
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Test Load).
I
15 pF
From Output
Under Test
Figure 3. Test Load Diagram
6
Z86160
CP96TEL1700
P R E L I M I N A R Y
DC ELECTRICAL CHARACTERISTICS
Z86160
T
A
= 0
C
Typical
to +70
C
at
Sym
Parameter
Min
Max
25
C
Units
Conditions
Max Input Voltage
V
CC
+ 0.3
V
I
IN
< 250
A
V
CH
Clock Input High Voltage
0.85 V
CC
V
CC
+ 0.3
V
Driven by External Clock Generator
V
CL
Clock Input Low Voltage
V
SS
0.3
0.8
V
Driven by External Clock Generator
V
IH
Input High Voltage
2
V
CC
+ 0.3
V
V
IL
Input Low Voltage
V
SS
0.3
0.2 V
CC
V
V
OH
Output High Voltage
4
V
I
OH
= 2.0 mA [3]
V
OH
Output High Voltage
V
CC
100 mV
V
I
OH
= 100
A
V
OL
Output Low Voltage
0.75
V
I
OL
= +7.0 mA [3]
V
OL
Output Low Voltage
0.3
V
I
OL
= +2.0 mA [3]
V
OL
Output Low Voltage
0.3
V
I
OL
= +1.0 mA [2]
I
IL
Input Leakage
2
2
A
V
IN
= 0 V, V
CC
I
OL
Output Leakage
2
2
A
V
IN
= 0 V, V
CC
I
CC
Supply Current (Standard Mode)
44
30
mA
[1] @ 16 MHz
I
CC1
Standby Current (Standard Mode)
18.75
5.75
mA
[1] HALT Mode V
IN
= 0 V, V
CC
@ 16 MHz
I
CC2
Standby Current
5
A
[1] @ 0 MHz V
IN
= 0 V, V
CC
= 3V
I
ALL
Auto Latch Low Current
14
14
5
A
Notes:
[1]
All inputs driven to either 0V or V
CC
, outputs floating.
[2]
V
CC
= 3.0V to 3.6V
[3]
V
CC
= 4.5V to 5.5V
Data Retention @ 2.0V BBU
7
Z86160
CP96TEL1700
P R E L I M I N A R Y
Additional Timing
AC CHARACTERISTICS
Additional Timing Table
Z86160
T
A
= 0
C
to +70
C
16 MHz
No
Symbol
Parameter
Min
Max
Units
Notes
1
TpC
Input Clock Period
TBD
n s
[1]
2
TrC,TfC
Clock Input Rise & Fall Times
TBD
n s
[1]
3
TwC
Input Clock Width
TBD
n s
[1]
Notes:
[1] Clock timing references use 0.85V
CC
for a logic 1 and 0.8V for a logic 0.
AC CHARACTERISTICS
Additional Timing Diagram
Clock
1
3
2
2
3
8
Z86160
CP96TEL1700
P R E L I M I N A R Y
LIMITATIONS
Be advised that AC Electrical Characteristics and Timing
Diagram information was unavailable at the time of this
publication, they will be supplied at a later date.
Development Projects:
Customer is cautioned that while reasonable efforts will be
employed to meet performance objectives and milestone
dates, development is subject to unanticipated problems
and delays. No production release is authorized or
committed until the Customer and Zilog have agreed upon
a Customer Procurement Specification for this project.
Low Margin:
Customer is advised that this product does not meet
Zilog's internal guardbanded test policies for the specifi-
cation requested and is supplied on an exception basis.
Customer is cautioned that delivery may be uncertain and
that, in addition to all other limitations on Zilog liability
stated on the front and back of the acknowledgement,
Zilog makes no claim as to quality and reliability under
the CPS. The product remains subject to standard
warranty for replacement due to defects in materials and
workmanship.
Pre-Characterization Product:
The product represented by this CPS is newly introduced
and Zilog has not completed the full characterization of the
product. The CPS states what Zilog knows about this
product at this time, but additional features or non-
conformance with some aspects of the CPS may be found,
either by Zilog or its customers in the course of further
application and characterization work. In addition, Zilog
cautions that delivery may be uncertain at times, due to
start-up yield issues.
1996 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of mer-
chantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
Zilog's products are not authorized for use as critical compo-
nents in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
FAX 408 370-8056
Internet: http//:www.zilog.com
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