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This Errata provides additional clarifying information for the Serial Peripheral Interface
(SPI) feature of the Z86C06 and Z86E06 subfamily of Microcontroller devices.
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The Z86C06 and Z86E06 subfamily of Microcontrollers does not support the Serial
Peripheral Interface (SPI) feature in slave mode. The Z86C06 and Z86E06 subfamily of
Microcontrollers does support the Serial Peripheral Interface (SPI) feature in master mode
but does not support SPI interrupts.
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Software workaround for the master mode SPI interrupt:
After the load instruction to the SPI shift register, the transfer is completed after four
NOP's with the SPI set to the highest clock speed of TCLK/2. Seven NOP's are required if
the clock speed is set to TCLK/4.
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The information contained within this document has been verified according to the general princi-
ples of electrical and mechanical engineering. Any applicable source code illustrated in the docu-
ment was either written by an authorized ZiLOG employee or licensed consultant. Permission to
use these codes in any form besides the intended application, must be approved through a license
agreement between both parties. ZiLOG will not be responsible for any code(s) used beyond the
intended application. Contact your local ZiLOG Sales Office to obtain necessary license agree-
ments.
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ZiLOG is a registered trademark of ZiLOG Inc. in the United States and in other countries. All
other products and/or service names mentioned herein may be trademarks of the companies with
which they are associated.
2003 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices,
applications, or technology described is intended to suggest possible uses and may be superseded.
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