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DS96DZ80301 (11/96)
P R E L I M I N A R Y
1-1
1
P
RELIMINARY
C
USTOMER
P
ROCUREMENT
S
PECIFICATION
Z86C02/E02/L02
1
L
OW
-C
OST
, 512-B
YTE
ROM
M
ICROCONTROLLERS
FEATURES
s
18-Pin DIP and SOIC Packages
s
0
C to 70
C Standard Temperature
40
C to 105
C Extended Temperature
(Z86C02/E02 only)
s
3.0V to 5.5V Operating Range (Z86C02)
4.5V to 5.5V Operating Range (Z86E02)
2.0V to 3.9V Operating Range (Z86L02)
s
14 Input / Output Lines
s
Five Vectored, Prioritized Interrupts from Five Different
Sources
s
Two On-Board Comparators
s
Software Enabled Watch-Dog Timer (WDT)
s
Programmable Interrupt Polarity
s
Two Standby Modes: STOP and HALT
s
Low-Voltage Protection
s
ROM Mask/OTP Options:
Low-Noise (Z86C02/E02 only)
ROM Protect
Auto Latch
Permanent Watch-Dog Timer (WDT)
RC Oscillator (Z86C02/L02 Only)
32 KHz Operation (Z86C02/L02 Only)
s
One Programmable 8-Bit Counter/Timer with a 6-Bit
Programmable Prescaler
s
Power-On Reset (POR) Timer
s
On-Chip Oscillator that Accepts RC, Crystal, Ceramic
Resonator, LC, or External Clock Drive (C02/L02 only)
s
On-Chip Oscillator that Accepts RC or External Clock
Drive (Z86E02 SL1903 only)
s
On-Chip Oscillator that Accepts Crystal, Ceramic
Resonator, LC, or External Clock Drive (Z86E02 only)
s
Clock-Free WDT Reset
s
Low-Power Consumption (50mw)
s
Fast Instruction Pointer (1.5
s @ 8 MHz)
s
Fourteen Digital Inputs at CMOS Levels;
Schmitt-Triggered
GENERAL DESCRIPTION
Zilog's Z86C02/E02/L02 microcontrollers (MCUs) are
members of the Z8
single-chip MCU family, which offer
easy software/hardware system expansion.
For applications demanding powerful I/O capabilities, the
MCU's dedicated input and output lines are grouped into
three ports, and are configurable under software control to
provide timing, status signals, or parallel I/O.
One on-chip counter/timer, with a large number of user-se-
lectable modes, off-load the system of administering real-
time tasks such as counting/timing and I/O data communi-
Device
ROM
(KB)
RAM*
(Bytes)
Speed
(MHz)
Auto
Latch
Permanent
WDT
Z86C02
512
61
8
Optional Optional
Z86E02
512
61
8
Optional Optional
Z86L02
512
61
8
Optional Optional
Note:
*General-Purpose
Z86C02/E02/L02
Low-Cost, 512-Byte ROM Microcontrollers
1-2
P R E L I M I N A R Y
DS96DZ80301 (11/96)
GENERAL DESCRIPTION
(Continued)
cations. Additionally, two on-board comparators process
analog signals with a common reference voltage (Figure
1).
Note:
All Signals with a preceding front slash, "/", are ac-
tive Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is
active Low, only).
Power connections follow conventional descriptions be-
low:
Connection
Circuit
Device
Power
V
CC
V
DD
Ground
GND
V
SS
Figure 1. Z86C02/E02/L02 Functional Block Diagram
Port 3
Counter/
Timer
Interrupt
Control
Two Analog
Comparators
Port 2
I/O
(Bit Programmable)
FLAG
Register
Pointer
General-Purpose
Register File
Machine
Timing & Inst.
Control
Program
Memory
Program
Counter
Vcc
GND
XTAL
Port 0
I/O
Input
ALU
Z86C02/E02/L02
Low-Cost, 512-Byte ROM Microcontrollers
1-3
P R E L I M I N A R Y
DS96DZ80301 (11/96)
GENERAL DESCRIPTION
(Continued)
PIN DESCRIPTIONS
Figure 2. EPROM Programming Mode Block Diagram
Z8 MCU
Address
Counter
Address MUX
Data MUX
Z8 POR
T2
Option Bits
EPROM
PGM
Mode Logic
D7-D0
D7-D0
D7-D0
A10-A0
A10-A0
A10-A0
3 Bits
Clear
P00
Clock
P01
EPM
P32
/CE
XT1
/PGM
P02
VPP
P33
/OE
P31
Figure 3. 18-Pin Standard Mode Configuration
1
2
9
3
4
5
6
7
8
18
17
16
15
14
13
12
11
10
P23
P22
P33
P21
P20
GND
P02
P01
P00
P24
P25
P32
P26
P27
Vcc
XTAL2
XTAL1
P31
Standard Mode
Table 1. 18-Pin Standard Mode Identification
Pin #
Symbol
Function
Direction
1-4
P24-P27
Port 2, Pins 4, 5, 6, 7
In/Output
5
V
CC
Power Supply
6
XTAL2
Crystal Oscillator
Clock
Output
7
XTAL1
Crystal Oscillator
Clock
Input
8
P31
Port 3, Pin 1, AN1
Input
9
P32
Port 3, Pin 2, AN2
Input
10
P33
Port 3, Pin 3, REF
Input
11-13
P00-P02
Port 0, Pins 0, 1, 2
In/Output
14
GND
Ground
15-18
P20-P23
Port 2, Pins 0, 1, 2, 3
In/Output
Z86C02/E02/L02
Low-Cost, 512-Byte ROM Microcontrollers
DS96DZ80301 (11/96)
P R E L I M I N A R Y
1-4
1
Figure 4. 18-Pin EPROM Mode Configuration
Table 2. 18-Pin EPROM Mode Identification
Pin #
Symbol
Function
Direction
1-4
D4-D7
Data 4, 5, 6, 7
In/Output
5
Vcc
Power Supply
6
NC
No Connection
7
/CE
Chip Enable
Input
8
/OE
Output Enable
Input
9
EPM
EPROM Program
Mode
Input
10
VPP
Program Voltage
Input
11
Clear
Clear Clock
Input
12
Clock
Address
Input
13
/PGM
Program Mode
Input
14
GND
Ground
15-18
D0-D3
Data 0, 1, 2, 3
In/Output
1
2
9
3
4
5
6
7
8
18
17
16
15
14
13
12
11
10
D3
D2
VPP
D1
D0
GND
/PGM
CLOCK
CLEAR
D4
D5
EPM
D6
D7
Vcc
N/C
/CE
/OE
EPROM Mode
Figure 5. 18-Pin SOIC Configuration
Table 3. 18-Pin SOIC Pin Identification
Standard Mode
Pin #
Symbol
Function
Direction
1-4
P24-P27
Port 2, Pins
4,5,6,7
In/Output
5
Vcc
Power Supply
6
XTAL2
Crystal Osc. Clock
Output
7
XTAL1
Crystal Osc. Clock
Input
8
P31
Port 3, Pin 1, AN1
Input
9
P32
Port 3, Pin 2, AN2
Input
10
P33
Port 3, Pin 3, REF
Input
11-13
P00-P02
Port 0, Pins 0,1,2
In/Output
14
GND
Ground
15-18
P20-P23
Port 2, Pins
0,1,2,3
In/Output
1
18
P24
P27
VCC
XTAL2
XTAL1
P31
P32
P23
P22
P21
P20
GND
P02
P01
P00
P33
P25
P26
2
3
4
5
6
7
8
9
17
16
15
14
13
12
11
10
Z86C02/E02/L02
Low-Cost, 512-Byte ROM Microcontrollers
DS96DZ80301 (11/96)
P R E L I M I N A R Y
1-5
1
ABSOLUTE MAXIMUM RATINGS
Notes:
Stresses greater than those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. This is a stress rating only; functional operation of
the device at any condition above those indicated in the
operational sections of these specifications is not implied.
Exposure to absolute maximum rating conditions for an
extended period may affect device reliability.
Total power dissipation should not exceed 462 mW for the
package. Power dissipation is calculated as follows:
1.
This applies to all pins except where otherwise noted.
2.
Maximum current into pin must be
600
A.
There is no input protection diode from pin to V
DD
.
3.
This excludes Pin 6 and Pin 7.
4.
Device pin is not at an output Low state.
Total Power dissipation = V
DD
x [I
DD
(sum of I
OH
)] + sum of [(V
DD
V
OH
) x I
OH
] + sum of (V
0L
x I
0L
)
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to
Ground. Positive current flows into the referenced pin (Fig-
ure 6).
CAPACITANCE
T
A
= 25
C, V
CC
= GND = 0V, f = 1.0 MHz, unmeasured pins returned to GND.
Parameter
Min
Max
Units
Ambient Temperature under Bias
40
+105
C
Storage Temperature
65
+150
C
Voltage on any Pin with Respect to V
SS
[Note 1]
0.7
+12
V
Voltage on V
DD
Pin with Respect to V
SS
0.3
+7
V
Voltage on Pin 7 with Respect to V
SS
[Note 2] (Z86C02/L02)
0.7
V
DD
+1
V
Voltage on Pin 7,8,9,10 with Respect to V
SS
[Note 2] (Z86E02)
0.7
V
DD
+1
V
Total Power Dissipation
462
mW
Maximum Allowed Current out of V
SS
300
mA
Maximum Allowed Current into V
DD
270
mA
Maximum Allowed Current into an Input Pin [Note 3]
600
+600
A
Maximum Allowed Current into an Open-Drain Pin [Note 4]
600
+600
A
Maximum Allowed Output Current Sinked by Any I/O Pin
20
mA
Maximum Allowed Output Current Sourced by Any I/O Pin
20
mA
Maximum Allowed Output Current Sinked by Port 2, Port 0
80
mA
Maximum Allowed Output Current Sourced by Port 2, Port 0
80
mA
Figure 6. Test Load Diagram
From Output
Under Test
150 pF
Parameter
Min
Max
Input capacitance
0
15 pF
Output capacitance
0
20 pF
I/O capacitance
0
25 pF