74AHC2G126DC - Dual Buffer/line Driver; 3-stateprovidesA Dual Non-inverting Buffer/line Driver With 3-state Output. The 3-state Output is Controlled BY The Output Enable Input (OE).A Low at Pin Noe Causes The Output to AssumeA High-impedance OFF-state. Features Symmetrical Output Impedance High Noise Immunity ESD Protection: HBM EIA/JESD22-A114-A Exceeds 2000V MM EIA/JESD22-A115-A Exceeds 200V CDM EIA/JESD22-C101 Exceeds 1000 V. Low Power Dissipation Balanced Propagation Delays SOT505-2 and SOT765-1 Package Specifi
74AHC2G126DP - Dual Buffer/line Driver; 3-stateprovidesA Dual Non-inverting Buffer/line Driver With 3-state Output. The 3-state Output is Controlled BY The Output Enable Input (OE).A Low at Pin Noe Causes The Output to AssumeA High-impedance OFF-state. Features Symmetrical Output Impedance High Noise Immunity ESD Protection: HBM EIA/JESD22-A114-A Exceeds 2000V MM EIA/JESD22-A115-A Exceeds 200V CDM EIA/JESD22-C101 Exceeds 1000 V. Low Power Dissipation Balanced Propagation Delays SOT505-2 and SOT765-1 Package Specifi
74AHC594 - General descriptionThe 74AHC594; 74AHCT594 isA high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided on both the shift and storage registers.A serial output (Q7S) is provided for cascading purp
74AHC595 - 8-bit Serial-in/serial Or Parallel-out Shift Register With Output Latches; 3-state
74AHC595D - 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state
74AHC595PW - 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state
74AHC74 - Dual D-type Flip-flop With Set and Reset; Positive-edge Trigger
74AHC74D - Dual D-type flip-flop with set and reset; positive-edge trigger
74AHC74PW - Dual D-type flip-flop with set and reset; positive-edge trigger
74AHC74PWDH - Dual D-type flip-flop with set and reset; positive-edge trigger
74AHCT2G126DC - Dual Buffer/line Driver; 3-stateprovidesA Dual Non-inverting Buffer/line Driver With 3-state Output. The 3-state Output is Controlled BY The Output Enable Input (OE).A Low at Pin Noe Causes The Output to AssumeA High-impedance OFF-state. Features Symmetrical Output Impedance High Noise Immunity ESD Protection: HBM EIA/JESD22-A114-A Exceeds 2000V MM EIA/JESD22-A115-A Exceeds 200V CDM EIA/JESD22-C101 Exceeds 1000 V. Low Power Dissipation Balanced Propagation Delays SOT505-2 and SOT765-1 Package Specifi
74AHCT2G126DP - Dual Buffer/line Driver; 3-stateprovidesA Dual Non-inverting Buffer/line Driver With 3-state Output. The 3-state Output is Controlled BY The Output Enable Input (OE).A Low at Pin Noe Causes The Output to AssumeA High-impedance OFF-state. Features Symmetrical Output Impedance High Noise Immunity ESD Protection: HBM EIA/JESD22-A114-A Exceeds 2000V MM EIA/JESD22-A115-A Exceeds 200V CDM EIA/JESD22-C101 Exceeds 1000 V. Low Power Dissipation Balanced Propagation Delays SOT505-2 and SOT765-1 Package Specifi
74AHCT594 - General descriptionThe 74AHC594; 74AHCT594 isA high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided on both the shift and storage registers.A serial output (Q7S) is provided for cascading purp
74AHCT595 - 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state
74AHCT595D - 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state
74AHCT595PW - 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state
74AHCT74 - Dual D-type flip-flop with set and reset; positive-edge trigger
74AHCT74D - Dual D-type flip-flop with set and reset; positive-edge trigger
74AHCT74PW - Dual D-type flip-flop with set and reset; positive-edge trigger
74AHCT74PWDH - Dual D-type flip-flop with set and reset; positive-edge trigger