ZL30414QGG1 (Zarlink) - OC-192 STM-64 SONET/SDH Clock Multiplier PLL The ZL30414 is an analog phase-locked loop (APLL) designed to provide jitter attenuation and rate conversion for SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment. The ZL30414 generates very low jitter clocks that meet the jitter requirements of Telcordia GR-253-CORE OC-192, OC-48, OC-12, OC-3 rates and ITU-T G.813 STM-64, STM-16, STM-4 and STM-1 rates. The ZL30414 acceptsA CMOS compatible reference at 19.44 MHz and, PLL (Phase locked loop)

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ZL30414QGG1 (Zarlink)

Electronic component documentation (datasheet) «ZL30414QGG1» (PLL (Phase locked loop)), manufacturer Zarlink. Download datasheet file:

Datasheet ZL30414QGG1 manufacturer Zarlink

Partname	ZL30414QGG1
Description	OC-192 STM-64 SONET/SDH Clock Multiplier PLL The ZL30414 is an analog phase-locked loop (APLL) designed to provide jitter attenuation and rate conversion for SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment. The ZL30414 generates very low jitter clocks that meet the jitter requirements of Telcordia GR-253-CORE OC-192, OC-48, OC-12, OC-3 rates and ITU-T G.813 STM-64, STM-16, STM-4 and STM-1 rates. The ZL30414 acceptsA CMOS compatible reference at 19.44 MHz and
Functional	PLL (Phase locked loop)
Manufacturer	Zarlink Semiconductor Inc.
Site	www.zarlink.com

Size	Pages: 0, 352.59Kb
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