2004 Fairchild Semiconductor Corporation
June 2004
RMDA29000 Rev. C
RMDA29000
RMDA29000
2731 GHz Drive Amplifier MMIC
General Description
The Fairchild Semiconductor RMDA29000 is a high
efficiency driver amplifier designed for use in point to point
and point to multi-point radios, and various communi-
cations applications. The RMDA29000 is a 3-stage GaAs
MMIC amplifier utilizing our advanced 0.15m gate length
Power PHEMT process and can be used in conjunction
with other driver or power amplifiers to achieve the required
total power output.
Features
22dB small signal gain (typ.)
23dBm saturated power out (typ.)
Circuit contains individual source Vias
Chip Size 3.41mm x 1.62mm
Absolute Ratings
Symbol
Parameter
Ratings
Units
Vd
Positive DC Voltage (+5V Typical)
+6
V
Vg
Negative DC Voltage
-2
V
Vdg
Simultaneous (VdVg)
+8
V
I
D
Positive DC Current
360
mA
P
IN
RF Input Power (from 50
source)
+10
dBm
T
C
Operating Baseplate Temperature
-30 to +85
C
T
STG
Storage Temperature Range
-55 to +125
C
R
jc
Thermal Resistance (Channel to Backside)
38
C/W
Device
2004 Fairchild Semiconductor Corporation
RMDA29000 Rev. C
RMDA29000
Electrical Characteristics
(At 25C), 50
system, Vd = +5V, Quiescent current (Idg) = 250mA
Note:
1:
Typical range of negative gate voltages is -0.9 to 0.0V to set typical Idq of 250mA.
2:
10MHz tone separation measured at 10dBm Power Out/tone.
Parameter
Min
Typ
Max
Units
Frequency Range
27
31
GHz
Gate Supply Voltage
1
(Vg)
-0.4
V
Gain Small Signal
18
22
28
dB
Gain Variation vs. Frequency
1
dB
Power Output at 1dBm Compression
21
dBm
Power Output Saturated: (Pin = +4dBm)
21
23
dBm
Drain Current Small Signal
250
mA
Drain Current at P1dB Compression
270
mA
Power Added Efficiency (PAE): at P1db
8
%
OIP3
2
30
dBm
Input Return Loss
5
10
dB
Output Return Loss
5
8
dB
2004 Fairchild Semiconductor Corporation
RMDA29000 Rev. C
RMDA29000
Application Information
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal
conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with
gold over nickel and should be capable of withstanding 325C for 15 minutes.
Die attachment should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for PHEMT
devices. Note that the backside of the chip is gold plated and is used as RF and DC ground.
These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of
bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of
wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges
through the device.
Recommended wire bonding uses 3 mils wide and 0.5 mil thick gold ribbon with lengths as short as practical allowing for
appropriate stress relief. The RF input and output bonds should be typically 0.012" long corresponding to a typical 2 mil gap
between the chip and the substrate material.
Figure 1. Functional Block Diagram
Figure 2. Chip Layout and Bond Pad Locations
(Chip Size is 3.405mm x 1.621mm x 50m Typical. Back of chip is RF and DC Ground)
MMIC CHIP
DRAIN
SUPPLY
Vd
RF OUT
RF IN
GROUND
(Back of the Chip)
GATE SUPPLY
Vg
0.642
0.0
2.375
3.236
3.242
2.157
0.427
3.405
0.0
Dimensions in mm
0.704
0.898
1.105
1.514
1.621
2004 Fairchild Semiconductor Corporation
RMDA29000 Rev. C
RMDA29000
RF IN
RF OUT
10000pF
10000pF
BOND WIRE Ls
10
L
L
0pF
10
L
L
0pF
DRAIN SUPPLY
Vd = +5V
GATE SUPPLY
Vg
GROUND
(Back of Chip)
MMIC CHIP
BOND WIRE Ls
Figure 3. Recommended Application Schematic Circuit Diagram
Figure 4. Recommended Assembly Diagram
Note:
Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief.
Vd should be biased from 1 supply as shown. Vg should be biased from 1 supply.
100pF
100pF
10000pF
10000pF
ALUMINA
50
ALUMINA
50
DIE-ATTACH
80Au/20Sn
Vdd (POSITIVE)
Vg (NEGATIVE)
2 MIL GAP
L < 0.015"
(4 Places)
RF OUTPUT
RF INPUT
2004 Fairchild Semiconductor Corporation
RMDA29000 Rev. C
RMDA29000
C1
0.1
F
C2
0.47
F
LM2941T
U1A
7400
R1
3.0k
R3
1.0k
D2
D1N6098
+6V
D3
D1N6098
2.62V
R4
1.2k
*
R2
6.8k
U2
0
C5
0.1
F
MMIC_VG
0
C3
22
F
R6
1k
R5
3k
0
0
C4
0.1
F
R7
8.2k
*
Adj. For Vg
5V Off:
5V Off:
+3.33V
+1.80V
*
0
0
0
R8
1.0k
0
1
2
3
0
4
2
1
5
3
5V
MMIC_+VDD
CNT
IN
GND
OUT
ADJ
AD820/AD
+
V-
V+
Recommended Procedure for Biasing and Operation
CAUTION: LOSS OF GATE VOLTAGE (Vg) WHILE
DRAIN VOLTAGE (Vd) IS PRESENT MAY DAMAGE THE
AMPLIFIER CHIP.
The following sequence of steps must be followed to
properly test the amplifier:
Step 1:
Turn off RF input power.
Step 2:
Connect the DC supply grounds to the ground of
the chip carrier. Slowly apply negative gate bias supply
voltage of -1.5V to Vg.
Step 3:
Slowly apply positive drain bias supply voltage of
+5V to Vd.
Step 4:
Adjust gate bias voltage to set the quiescent
current of Idq = 250mA.
Step 5:
After the bias condition is established, the RF input
signal may now be applied at the appropriate frequency
band.
Step 6:
Follow turn-off sequence of:
(i) Turn off RF input power,
(ii) Turn down and off drain voltage (Vd),
(iii) Turn down and off gate bias voltage (Vg).
An example auto bias sequencing circuit to apply negative
gate voltage and positive drain voltage for the above
procedure is shown below.
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