STDL131
0.18
m 1.8V CMOS Standard Cell Library
for Pure Logic Products
Data Book
Copyright
2003, 2002 by Samsung Electronics Co., Ltd.
All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior
written consent of the publisher. Samsung assumes no responsibility for any errors resulting from the use of the
information contained herein, nor does it convey any license under the patent rights of Samsung or others.
Samsung reserves the right to make changes in its products or product specification to improve function or design
at any time, without notice.
SEC and STDL131 are trademarks of Samsung Electronics Co., Ltd. Verilog is a registered trademark of Cadence
Design Systems, Inc. Viewlogic is a registered trademark of Viewlogic Systems, Inc. Mentor is a registered
trademark or Mentor Graphics Co. Synopsys is a registered trademark of Synopsys, Inc.
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Samsung ASIC
iv
STDL131
Introduction
This databook contains information about STDL131 0.18
m 1.8V standard cell library for pure Logic
products developed by SEC (Samsung Electronics Corporation).
The "library" basically contains various kinds of primitive and I/O cells and cores which are used for
developing ASIC (Application Specific Integrated Circuit). It also includes a design kit helping designers to
work in a workstation platform, and all sorts of design environments needed for an automatic chip design.
There are six chapters in this databook:
Chapter 1
Introduction
Chapter 2
Electrical Characteristics
Chapter 3
Primitive Cells
Chapter 4
Input/Output Cells
Chapter 5
Compiled Memories
Chapter 6
PLL
Appendix
In this databook, each cell is followed by its AC electrical characteristics, and these characteristic values are
almost equal when the corresponding cell is operated in a real chip.
The purpose of this databook is to prevent any misuse or misapplication of STDL131 cell library by providing
precise information about the cell list, electrical data, directions for use, and matters demanding special
attention.
If you want to get more information about digital cores and analog cores that are not included in this databook,
access the Samsung ASIC web site(http://www.samsung.com/Products/Semiconductor/ASIC) or contact
head office.
Samsung ASIC
v
STDL131
Contents
1
Introduction
1.1 Library Description ................................................................................................................1-1
1.2 Features ................................................................................................................................1-2
1.3 EDA Support .........................................................................................................................1-4
1.4 Product Family ......................................................................................................................1-4
1.4.1 Analog Cores ......................................................................................................1-4
1.4.2 Primitive Cells .....................................................................................................1-8
1.4.3 Compiled Memories ............................................................................................1-9
1.4.4 Input/Output Cells ...............................................................................................1-11
1.5
Timings .................................................................................................................................1-14
1.6
Design for Test (DFT) Methodology......................................................................................1-22
1.7
Maximum Fanouts ................................................................................................................1-25
1.8
Packages Capability by Pitch and Lead Count .....................................................................1-32
1.9
Power Dissipation .................................................................................................................1-33
1.10 V
DD
/V
SS
Rules and Guidelines .............................................................................................1-37
1.11 Crystal Oscillator Considerations .........................................................................................1-45
2
Electrical Characteristics
DC Electrical Characteristics.........................................................................................................2-1
3
Primitive Cells
Overview .......................................................................................................................................3-1
Summary Tables ...........................................................................................................................3-2
Primitive Cells
AD2_LP/AD2D2_LP/AD2D4_LP/AD2D8_LP ................................................................................3-14
AD2B_LP/AD2BD2_LP/AD2BD4_LP/AD2BD8_LP ......................................................................3-16
AD3_LP/AD3D2_LP/AD3D4_LP ...................................................................................................3-18
AD4_LP/AD4D2_LP/AD4D4_LP ...................................................................................................3-20
AD5_LP/AD5D2_LP/AD5D4_LP ...................................................................................................3-22
ND2_LP/ND2D2_LP/ND2D4_LP/ND2D8_LP ...............................................................................3-25
ND2B_LP/ND2BD2_LP/ND2BD4_LP/ND2BD8_LP......................................................................3-27
ND3_LP/ND3D2_LP/ND3D4_LP ..................................................................................................3-29
ND3B_LP/ND3BD2_LP/ND3BD4_LP/ND2BD8_LP......................................................................3-32
ND4_LP/ND4D2_LP/ND4D4_LP ..................................................................................................3-35
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