LZ2336
DESCRIPTION
Two-power supply
V and +12 V) operation
1 / 3 type B/W CCD Area Sensor for EIA
PIN CONNECTIONS
is a 1 /3-type (6.0 mm) solid-state image
sensor that consists of PN phote-diodes and
CCDS (charge-coupled devices) driven by only
positive voltages. Having approximately 190000
pixels (horizontal 384
X
vertical 492), the sensor
provides a stable B/W image.
FEATURES
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Number of pixels : 362 (H) 492 (V)
Pixel pitch : 13.6
(H) 7.5
(V)
Number of optical black pixels
: Horizontal; front 2 and rear 20
Low fixed pattern noise and lag
No sticking and no image distortion
Blooming suppression structure
Built-in output amplifier
Variable electronic shutter (1 /60 to 1/1 O 000
S
)
Compatible with EIA standard
16-PIN SDIP
TOP VIEW
1
GND
0 s
OD
H2B
H2
Package : 16-pin
GND
0 s
RD
,S
OFD
"In
of
by device
WARP
no
any
any of SHARP's
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dats
etc
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latest
of
any SHARPs device
149
LZ2336
PIN DESCRIPTION
SYMBOL
PIN NAME
transistor drain
I
OD
Output transistor drain
0 s
Video
Reset transistor gate clock
I
Vertical shift register gate clock
Horizontal shift register gate clock
Transfer gate clock
OFD
Overflow drain
T
I
Test terminal
GND
Ground
ABSOLUTE MAXIMUM RATINGS
(Ta =
)
PARAMETER
SYMBOL
RATING
UNIT
transistor drain voltage
O t o
+ 1 5
v
Reset transistor drain voltage
V
RD
O t o + 1 5
v
Test terminal,
O t o + 1 5
v
Reset sate clock voltage
0.3
to
+ 1 5
v
Vertical shift register clock voltage
0.3
to +15
v
Horizontal shift register clock voltage
0.3
to +15
v
Transfer
clock voltage
0.3
to
+ 1 5
v
Overflow
drain voltage
O to
+ 2 7
v
Storage temperature
Tstg
4 0 t o
ambient
Topr
20
to
+ 7 0
150
RECOMMENDED OPERATING CONDITIONS
MIN.
TYP.
MAX.
UNIT
NOTE
Operating ambient
Topr
25.0
Output transistor drain voltage
12.0
12.5
14.0
v
Reset transistor drain voltage
Voo
v
Overflow
When
is applied
Vom
3,0
12.0
v
1
drain
When pulse is applied
12.0
12.5
voltage
p-p level
14.0
v
2
Test terminal,
VOD
v
Ground voltage
GND
0.0
v
a
LOW level
Transfer gate clock
0.05
0.0
0,05
v
HIGH level
12.0
12.5
14.0
v
Vertical shift
LOW level
0,05
0.0
0.05
v
register clock
HIGH level
4.7
5.0
6.0
v
Horizontal shift
LOW level
V
0.05
0,0
0.05
v
register clock
HIGH level
v
4.7
5.0
6.0
v
LOW level
0.0
Reset gate
- 10,5
v
HIGH level
-6.0
9.5
v
Vertical shift register clock frequency
15.73
kHz
Horizontal shift register clock frequency
6.75
MHz
Reset gate clock frequency
6.75
MHz
Horizontal shift register clock phase
tw2
0.0
5.0
10.0
ns
3
NOTES :
1. When
voltage is applied, shutter speed is 1/@ seconds.
When
pulse is applied,
shutter speed is less than 1/60 seconds.
151
ELECTRICAL CHARACTERISTICS (Drive method : Field Accumulation)
Operating conditions : typical values for the recommended operating conditions, Color
temperature of light source : 3200 K /
cut-off filter (CM-500, 1
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
NOTE
Photo response non-uniformity
PRNU
15
`?/0
2
Saturation signal
Vsat
3
Dark output voltage
Vdark
15.0
1, 4
Dark signal non-uniformity
DSNU
1.5
5.0
1, 5
Sensitivity
R
160
220
6
Smear ratio
SMR
85
76
7
Image lag
Al
1.0
8
Blooming suppression ratio
ABL
1000
9
Output transistor drain current
5.0
Output impedance
400
.
standard output voltage is defined as 150
by the
average output voltage under uniform illumination.
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The standard exposure level is defined when the average
output voltage is 150
under uniform illumination.
NOTES :
6
1. Ta :
2. The image area is divided into 10x 10 segments. The seg-
7
ment's voltage is the average output voltage of all the
pixels within the segment. PRNU is defined by (Vmax
where Vmax and Vmin are the maximum and
the minimum values of each segment's voltage respec-
tively, when the average output voltage Vo is 150mV.
3. The image area is divided into 10x 10 segments.
8
The saturation signal is defined as the minimum of each
segment's voltage which is the average output voltage of
all the pixels
the segment, when the exposure level
is set as 10 times, compared to standard level,
4. The average output voltage under a non-exposure condition.
9
5. The image
is
into 10x
10
segments. DSNU is
defined by
under the non-exposure con-
dition where Vdmax and Vdmin are the maximum and the
minimum values of each segment's voltage, respectively,
that is the average output voltage over all pixels in the
segment.
The average output voltage when a
ight source
attached with a
reflector is imaged by a lens of F4,
f50 mm.
The sensor is adjusted to
a V/l O square at the
center of image area where V is the vertical length of the
image area, SMR is defined by the ratio of the output
voltage detected during the vertical blanking period to the
maximum of the pixel voltage in the V/l O square.
The sensor is exposed at the exposure level correspond-
ing to the standard condition preceding non-exposure con-
dition. Al is defined by the ratio between the output volt-
age measured at the 1st field during the non-exposure
period and the standard output voltage.
The sensor is adjusted to position a V/l O square at the
center of image area. ABL is the ratio between the ex-
posure at the standard condition and the exposure at a
point where a blooming is observed.